Ioannis Papaefstathiou
Orcid: 0000-0001-6386-5616
According to our database1,
Ioannis Papaefstathiou
authored at least 162 papers
between 1999 and 2024.
Collaborative distances:
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on orcid.org
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on ece.tuc.gr
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Bibliography
2024
Microprocess. Microsystems, 2024
Fast, Accurate and Distributed Simulation of novel HPC systems incorporating ARM and RISC-V CPUs.
Proceedings of the 33rd International Symposium on High-Performance Parallel and Distributed Computing, 2024
REBECCA: Reconfigurable Heterogeneous Highly Parallel Processing Platform for Safe and Secure AI.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024
2023
IEEE Trans. Parallel Distributed Syst., October, 2023
Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services.
CoRR, 2023
Proceedings of the XXIX International Conference on Information, 2023
VITAMIN-V: Virtual Environment and Tool-Boxing for Trustworthy Development of RISC-V Based Cloud Services.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
Optimizing Industrial Applications for Heterogeneous HPC Systems: The OPTIMA Project Intermediate stage.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Early Results of Mapping Industrial Applications on Heterogeneous HPC Systems: The OPTIMA Project.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023
eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale, Extensible, Processor Ecosystem.
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023
2022
Making Citizens' systems more Secure: Practical Encryption Bypassing and Countermeasures.
Proceedings of the IEEE Symposium on Computers and Communications, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
ACM Trans. Comput. Heal., 2021
Proceedings of the 25th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2021
2020
ACM Trans. Reconfigurable Technol. Syst., 2020
ACM Trans. Archit. Code Optim., 2020
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
A Unified Novel Neural Network Approach and a Prototype Hardware Implementation for Ultra-Low Power EEG Classification.
IEEE Trans. Biomed. Circuits Syst., 2019
Optimized FPGA Implementation of a Compute-Intensive Oil Reservoir Simulation Algorithm.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019
An Open-Source High-Throughput, Reduced Memory Footprint, Face Detection, Pose Estimation and Landmark Localization System.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
2018
A Novel, Simulator for Heterogeneous Cloud Systems that Incorporate Custom Hardware Accelerators.
IEEE Trans. Multi Scale Comput. Syst., 2018
Data-Driven Background Subtraction Algorithm for In-Camera Acceleration in Thermal Imagery.
IEEE Trans. Circuits Syst. Video Technol., 2018
Future Gener. Comput. Syst., 2018
The Industrial Internet of Things as an enabler for a Circular Economy Hy-LP: A novel IIoT protocol, evaluated on a wind park's SDN/NFV-enabled 5G industrial network.
Comput. Commun., 2018
AmbISPDM - Managing embedded systems in ambient environments and disaster mitigation planning.
Appl. Intell., 2018
Extending the Forward Error Correction Paradigm for Multi-Hop Wireless Sensor Networks.
Proceedings of the 9th IFIP International Conference on New Technologies, 2018
An open-source extendable, highly-accurate and security aware simulator for cloud applications.
Proceedings of the 21st Conference on Innovation in Clouds, 2018
Proceedings of the 2018 IEEE International Conference on Communications, 2018
COSSIM: An Open-Source Integrated Solution to Address the Simulator Gap for Systems of Systems.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
HLS Algorithmic Explorations for HPC Execution on Reconfigurable Hardware - ECOSCALE.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018
2017
Real-time management of railway CPS secure administration of IoT and CPS infrastructure.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017
Lightweight & secure industrial IoT communications via the MQ telemetry transport protocol.
Proceedings of the 2017 IEEE Symposium on Computers and Communications, 2017
Proceedings of the 2017 IEEE Symposium on Computers and Communications, 2017
An Architecture for the Acceleration of a Hybrid Leaky Integrate and Fire SNN on the Convey HC-2ex FPGA-Based Processor.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017
Proceedings of the 13th International Conference on Distributed Computing in Sensor Systems, 2017
A novel way to efficiently simulate complex full systems incorporating hardware accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
ACM Trans. Archit. Code Optim., 2016
IEEE Softw., 2016
Secur. Commun. Networks, 2016
Inf. Secur. J. A Glob. Perspect., 2016
Variational Inference Background Subtraction Algorithm for in-Camera Acceleration in Thermal Imagery.
CoRR, 2016
Comput., 2016
Proceedings of the 2016 IEEE Global Communications Conference, 2016
Proceedings of the 2016 IEEE Global Engineering Education Conference, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Secur. Commun. Networks, 2015
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Microprocess. Microsystems, 2015
IACR Cryptol. ePrint Arch., 2015
Proceedings of the Information Security Theory and Practice, 2015
Proceedings of the Information Security Theory and Practice, 2015
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015
2014
Reconfiguring the Bioinformatics Computational Spectrum: Challenges and Opportunities of FPGA-Based Bioinformatics Acceleration Platforms.
IEEE Des. Test, 2014
Proceedings of the Information Security Theory and Practice. Securing the Internet of Things, 2014
Proceedings of the 6th International Conference on New Technologies, Mobility and Security, 2014
Evaluation of RPL with a transmission count-efficient and trust-aware routing metric.
Proceedings of the IEEE International Conference on Communications, 2014
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the 2014 IEEE Emerging Technology and Factory Automation, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014
ModConTR: A modular and configurable trust and reputation-based system for secure routing in ad-hoc networks.
Proceedings of the 11th IEEE/ACS International Conference on Computer Systems and Applications, 2014
2013
Evaluating routing metric composition approaches for QoS differentiation in low power and lossy networks.
Wirel. Networks, 2013
A novel low-power embedded object recognition system working at multi-frames per second.
ACM Trans. Embed. Comput. Syst., 2013
Significantly reducing MPI intercommunication latency and power overhead in both embedded and HPC systems.
ACM Trans. Archit. Code Optim., 2013
HC-CART: A parallel system implementation of data mining classification and regression tree (CART) algorithm on a multi-FPGA system.
ACM Trans. Archit. Code Optim., 2013
Microprocess. Microsystems, 2013
Proceedings of the IFIP Wireless Days, 2013
Proceedings of the IEEE International Symposium on Signal Processing and Information Technology, 2013
Fast, FPGA-based Rainbow Table creation for attacking encrypted mobile communications.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Parallelizing bioinformatics and security applications on a low-cost multi-core system.
Proceedings of the ACS International Conference on Computer Systems and Applications, 2013
Proceedings of the AFRICON 2013, Pointe aux Piments, Mauritius, September 9-12, 2013, 2013
A novel highly flexible network multi-processor optimised for reconfigurable devices.
Proceedings of the AFRICON 2013, Pointe aux Piments, Mauritius, September 9-12, 2013, 2013
2012
Proceedings of the 2012 IEEE Wireless Communications and Networking Conference, 2012
Using hardware-based forward error correction to reduce the overall energy consumption of WSNs.
Proceedings of the 2012 IEEE Wireless Communications and Networking Conference, 2012
Proceedings of the 16th Panhellenic Conference on Informatics, PCI 2012, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
A novel low-power embedded object recognition system working at multi-frames per second (Extended abstract).
Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
An FPGA-based parallel processor for Black-Scholes option pricing using finite differences schemes.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
Proceedings of IEEE International Conference on Communications, 2011
FPGA power consumption measurements and estimations under different implementation parameters.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011
Novel and Highly Efficient Reconfigurable Implementation of Data Mining Classification Tree.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Architecture, Design, and Experimental Evaluation of a Lightfield Descriptor Depth Buffer Algorithm on Reconfigurable Logic and on a GPU.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Reconfigurable Computing IP Cores for Multiple Sequence Alignment.
Proceedings of the BIOINFORMATICS 2011, 2011
2010
ACM Trans. Reconfigurable Technol. Syst., 2010
An Open-Source Scaled Automobile Platform for Fault-Tolerant Electronic Stability Control.
IEEE Trans. Instrum. Meas., 2010
Development and implementation of a Network Processor Architecture in reconfigurable logic (FPGA).
Proceedings of the 8th Workshop on Intelligent Solutions in Embedded Systems, 2010
Using Reconfigurable Hardware Devices in WSNs for Reducing the Energy Consumption of Routing and Security Tasks.
Proceedings of the Global Communications Conference, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010
2009
IEEE Des. Test Comput., 2009
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009
Design and Implementation of an UWB Digital Transmitter Based on the Multiband OFDM Physical Layer Proposal.
Proceedings of the Twentienth IEEE/IFIP International Symposium on Rapid System Prototyping, 2009
A fast parallel matrix multiplication reconfigurable unit utilized in face recognitions systems.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Design space exploration of reconfigurable systems for calculating flying object's optimal noise reduction paths.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
A self-reconfiguring architecture supporting multiple objective functions in genetic algorithms.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009
Proceedings of the Towards the Future Internet - A European Research Perspective, 2009
Proceedings of the FCCM 2009, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 6th IEEE Consumer Communications and Networking Conference, 2009
Proceedings of the Ad-Hoc, Mobile and Wireless Networks, 8th International Conference, 2009
2008
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008
Proceedings of IEEE International Conference on Communications, 2008
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008
2007
Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units.
Microprocess. Microsystems, 2007
A Memory-Efficient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007
Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling Salesman Problem.
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007
Proceedings of the 12th IEEE Symposium on Computers and Communications (ISCC 2007), 2007
Proceedings of the INFOCOM 2007. 26th IEEE International Conference on Computer Communications, 2007
A buffered crossbar-based chip interconnection framework supporting quality of service.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
An innovative low-cost Classification Scheme for combined multi-Gigabit IP and Ethernet Networks.
Proceedings of IEEE International Conference on Communications, 2006
A hardware-engine for layer-2 classification in low-storage, ultra-high bandwidth environments.
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006
2005
Proceedings of the 30th Annual IEEE Conference on Local Computer Networks (LCN 2005), 2005
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005
2004
Guest Editors' Introduction: Network Processors for Future High-End Systems and Applications.
IEEE Micro, 2004
Microprocess. Microsystems, 2004
Microprocess. Microsystems, 2004
J. Circuits Syst. Comput., 2004
IEEE Commun. Lett., 2004
Proceedings of IEEE International Conference on Communications, 2004
Proceedings of the 2004 Design, 2004
2003
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the High Speed Networks and Multimedia Communications, 2003
A fully-programmable memory management system optimizing queue handling at multi-gigabit rates.
Proceedings of the 40th Design Automation Conference, 2003
GFS: An Efficient Implementation of Fair Scheduling for Mult-Gigabit Packet Networks.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003
2002
Read, use, simulate, experiment and build: an integrated approach for teaching computer architecture.
Proceedings of the 2002 workshop on Computer architecture education, 2002
2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
Measurement Based Connection Admission Control Algorithm for ATM Networks that Use Low Level Compression.
Proceedings of the Telecommunications and IT Convergence Towards Service E-volution, 2000
1999
Proceedings of the IEEE International Performance Computing and Communications Conference, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the Data Compression Conference, 1999