Insik Yoon
Orcid: 0000-0003-4545-4404
According to our database1,
Insik Yoon
authored at least 13 papers
between 2012 and 2019.
Collaborative distances:
Collaborative distances:
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Bibliography
2019
PhD thesis, 2019
A 55-nm, 1.0-0.4V, 1.25-pJ/MAC Time-Domain Mixed-Signal Neuromorphic Accelerator With Stochastic Synapses for Reinforcement Learning in Autonomous Mobile Robots.
IEEE J. Solid State Circuits, 2019
Hierarchical Memory System With STT-MRAM and SRAM to Support Transfer and Real-Time Reinforcement Learning in Autonomous Drones.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
Design space exploration of Ferroelectric FET based Processing-in-Memory DNN Accelerator.
CoRR, 2019
Transfer and Online Reinforcement Learning in STT-MRAM Based Embedded Systems for Autonomous Drones.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
A 55nm 50nJ/encode 13nJ/decode Homomorphic Encryption Crypto-Engine for IoT Nodes to Enable Secure Computation on Encrypted Data.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
Modeling and Analysis of Magnetic Field Induced Coupling on Embedded STT-MRAM Arrays.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
A 55nm time-domain mixed-signal neuromorphic accelerator with stochastic synapses and embedded reinforcement learning for autonomous micro-robots.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A FeFET Based Processing-In-Memory Architecture for Solving Distributed Least-Square Optimizations.
Proceedings of the 76th Device Research Conference, 2018
2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Proceedings of the 26th IEEE Asian Test Symposium, 2017
2016
EMACS: Efficient MBIST architecture for test and characterization of STT-MRAM arrays.
Proceedings of the 2016 IEEE International Test Conference, 2016
2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012