Inhak Han

According to our database1, Inhak Han authored at least 11 papers between 2011 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Clock Gating Synthesis of Netlist with Cyclic Logic Paths.
Proceedings of the International Conference on Computer-Aided Design, 2019

2018
Folded Circuit Synthesis: Min-Area Logic Synthesis Using Dual-Edge-Triggered Flip-Flops.
ACM Trans. Design Autom. Electr. Syst., 2018

Transient Clock Power Estimation of Pre-CTS Netlist.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2016
Register grouping for synthesis of clock gating logic.
Proceedings of the International Conference on IC Design and Technology, 2016

Buffer insertion to remove hold violations at multiple process corners.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2014
Simplifying Clock Gating Logic by Matching Factored Forms.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2013
Folded circuit synthesis: Logic simplification using dual edge-triggered flip-flops.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

2012
Clock Gating Synthesis of Pulsed-Latch Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Synthesis of clock gating logic through factored form matching.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2011
Thermal signature: a simple yet accurate thermal index for floorplan optimization.
Proceedings of the 48th Design Automation Conference, 2011

Pulser gating: A clock gating of pulsed-latch circuits.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011


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