Ingrid Verbauwhede
Orcid: 0000-0002-0879-076XAffiliations:
- Catholic University of Leuven, Belgium
According to our database1,
Ingrid Verbauwhede
authored at least 439 papers
between 1987 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2013, "For contributions to design of secure integrated circuits and systems".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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on id.loc.gov
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on d-nb.info
On csauthors.net:
Bibliography
2024
Side-channel Analysis of Lattice-based Post-quantum Cryptography: Exploiting Polynomial Multiplication.
ACM Trans. Embed. Comput. Syst., March, 2024
Characterization of Oscillator Phase Noise Arising From Multiple Sources for ASIC True Random Number Generation.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024
Optimizing Linear Correctors: A Tight Output Min-Entropy Bound and Selection Technique.
IEEE Trans. Inf. Forensics Secur., 2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2024
Masking Gaussian Elimination at Arbitrary Order, with Application to Multivariate- and Code-Based PQC.
IACR Cryptol. ePrint Arch., 2024
IACR Cryptol. ePrint Arch., 2024
Scabbard: An Exploratory Study on Hardware Aware Design Choices of Learning with Rounding-based Key Encapsulation Mechanisms.
IACR Cryptol. ePrint Arch., 2024
IACR Cryptol. ePrint Arch., 2024
Exploiting Bias Temperature Instability for Reservoir Computing in Edge Artificial Intelligence Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
Reducing Reservoir Dimensionality with Phase Space Construction for Simplified Hardware Implementation.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2024, 2024
2023
Revisiting Higher-Order Masked Comparison for Lattice-Based Cryptography: Algorithms and Bit-Sliced Implementations.
IEEE Trans. Computers, February, 2023
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023
A 334 μW 0.158 mm<sup>2</sup> ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom-Cook Multiplication.
IEEE J. Solid State Circuits, 2023
A practical key-recovery attack on LWE-based key- encapsulation mechanism schemes using Rowhammer.
IACR Cryptol. ePrint Arch., 2023
IACR Cryptol. ePrint Arch., 2023
IACR Cryptol. ePrint Arch., 2023
IACR Cryptol. ePrint Arch., 2023
A 334µW 0.158mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber with Low-latency Striding Toom-Cook Multiplication Extended Version.
IACR Cryptol. ePrint Arch., 2023
Secure and Efficient Post-Quantum Cryptography in Hardware and Software (Dagstuhl Seminar 23152).
Dagstuhl Reports, 2023
A 334μW 0.158mm<sup>2</sup> ASIC for Post-Quantum Key-Encapsulation Mechanism Saber with Low-latency Striding Toom-Cook Multiplication Authors Version.
CoRR, 2023
Proceedings of the 32nd USENIX Security Symposium, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic Circuits.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023
Proceedings of the Smart Card Research and Advanced Applications, 2023
Proceedings of the 2023 ACM Asia Conference on Computer and Communications Security, 2023
2022
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
An energy and area efficient, all digital entropy source compatible with modern standards based on jitter pipelining.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
TROT: A Three-Edge Ring Oscillator Based True Random Number Generator With Time-to-Digital Conversion.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Side-Channel Analysis of Lattice-Based Post-Quantum Cryptography: Exploiting Polynomial Multiplication.
IACR Cryptol. ePrint Arch., 2022
BASALISC: Flexible Asynchronous Hardware Accelerator for Fully Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2022
IACR Cryptol. ePrint Arch., 2022
IEEE Des. Test, 2022
A 334uW 0.158mm<sup>2</sup> Saber Learning with Rounding based Post-Quantum Crypto Accelerator.
CoRR, 2022
Proceedings of the 31st USENIX Security Symposium, 2022
Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
Design and Analysis of Configurable Ring Oscillators for True Random Number Generation Based on Coherent Sampling.
ACM Trans. Reconfigurable Technol. Syst., 2021
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021
ACM J. Emerg. Technol. Comput. Syst., 2021
Proceedings of the 42nd IEEE Symposium on Security and Privacy, 2021
Session 36 Overview: Hardware Security Digital Architectures and Systems Subcommittee.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Prime+Scope: Overcoming the Observer Effect for High-Precision Cache Contention Attacks.
Proceedings of the CCS '21: 2021 ACM SIGSAC Conference on Computer and Communications Security, Virtual Event, Republic of Korea, November 15, 2021
2020
Time-memory trade-off in Toom-Cook multiplication: an application to module-lattice based cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020
IEEE Trans. Computers, 2020
J. Cryptogr. Eng., 2020
IACR Cryptol. ePrint Arch., 2020
Compact domain-specific co-processor for accelerating module lattice-based key encapsulation mechanism.
IACR Cryptol. ePrint Arch., 2020
Proceedings of the 17th Workshop on Fault Detection and Tolerance in Cryptography, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
ACM Trans. Embed. Comput. Syst., 2019
IEEE Trans. Dependable Secur. Comput., 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Secur. Commun. Networks, 2019
A Physically Unclonable Function Using Soft Oxide Breakdown Featuring 0% Native BER and 51.8 fJ/bit in 40-nm CMOS.
IEEE J. Solid State Circuits, 2019
FPGA-based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data.
IACR Cryptol. ePrint Arch., 2019
Pushing the speed limit of constant-time discrete Gaussian sampling. A case study on Falcon.
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
Advanced profiling for probabilistic Prime+Probe attacks and covert channels in ScatterCache.
CoRR, 2019
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019
Proceedings of the 4th Workshop on System Software for Trusted Execution, 2019
Proceedings of the Public-Key Cryptography - PKC 2019, 2019
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019
Pushing the speed limit of constant-time discrete Gaussian sampling. A case study on the Falcon signature scheme.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of ACM Workshop on Theory of Implementation Security, 2019
Proceedings of the Smart Card Research and Advanced Applications, 2019
2018
IEEE Trans. Inf. Forensics Secur., 2018
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018
ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018
HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation.
IEEE Trans. Computers, 2018
IEEE Trans. Computers, 2018
Arithmetic of $$\tau $$ τ -adic expansions for lightweight Koblitz curve cryptography.
J. Cryptogr. Eng., 2018
IACR Cryptol. ePrint Arch., 2018
IACR Cryptol. ePrint Arch., 2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Reliability Physics Symposium, 2018
The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators.
Proceedings of the 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2018
Proceedings of the 12th European Workshop on Microelectronics Education, 2018
Design and testing methodologies for true random number generators towards industry certification.
Proceedings of the 23rd IEEE European Test Symposium, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
An In-Depth and Black-Box Characterization of the Effects of Laser Pulses on ATmega328P.
Proceedings of the Smart Card Research and Advanced Applications, 2018
A Physically Unclonable Function with 0% BER Using Soft Oxide Breakdown in 40nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018
2017
ACM Trans. Priv. Secur., 2017
ACM Trans. Embed. Comput. Syst., 2017
ACM Trans. Embed. Comput. Syst., 2017
IEEE Trans. Computers, 2017
Elliptic Curve Cryptography with Efficiently Computable Endomorphisms and Its Hardware Implementations for the Internet of Things.
IEEE Trans. Computers, 2017
A 5.1<i>μ</i><i>J</i> per point-multiplication elliptic curve cryptographic processor.
Int. J. Circuit Theory Appl., 2017
IEEE Embed. Syst. Lett., 2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
Proceedings of the 2017 ACM on Asia Conference on Computer and Communications Security, 2017
Proceedings of the Smart Card Research and Advanced Applications, 2017
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017
2016
A Lockdown Technique to Prevent Machine Learning on PUFs for Lightweight Authentication.
IEEE Trans. Multi Scale Comput. Syst., 2016
Canary Numbers: Design for Light-weight Online Testability of True Random Number Generators.
IACR Cryptol. ePrint Arch., 2016
IACR Cryptol. ePrint Arch., 2016
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
A Tiny Coprocessor for Elliptic Curve Cryptography over the 256-bit NIST Prime Field.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2016
Proceedings of the Selected Areas in Cryptography - SAC 2016, 2016
Proceedings of the Post-Quantum Cryptography - 7th International Workshop, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016
Upper bounds on the min-entropy of RO Sum, Arbiter, Feed-Forward Arbiter, and S-ArbRO PUFs.
Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016
Proceedings of the 21th IEEE European Test Symposium, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2016
Proceedings of the Sixth ACM on Conference on Data and Application Security and Privacy, 2016
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2016, 2016
A Fast and Compact FPGA Implementation of Elliptic Curve Cryptography Using Lambda Coordinates.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2016, 2016
2015
Accelerating Scalar Conversion for Koblitz Curve Cryptoprocessors on Hardware Platforms.
IEEE Trans. Very Large Scale Integr. Syst., 2015
ACM Trans. Reconfigurable Technol. Syst., 2015
ACM Trans. Embed. Comput. Syst., 2015
High-Speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs.
J. Cryptogr. Eng., 2015
IACR Cryptol. ePrint Arch., 2015
IACR Cryptol. ePrint Arch., 2015
Lightweight Coprocessor for Koblitz Curves: 283-bit ECC Including Scalar Conversion with only 4300 Gates.
IACR Cryptol. ePrint Arch., 2015
IACR Cryptol. ePrint Arch., 2015
IACR Cryptol. ePrint Arch., 2015
VLSI Implementation of Double-Base Scalar Multiplication on a Twisted Edwards Curve with an Efficiently Computable Endomorphism.
IACR Cryptol. ePrint Arch., 2015
IACR Cryptol. ePrint Arch., 2015
ACM Comput. Surv., 2015
Sci. China Inf. Sci., 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 31st Annual Computer Security Applications Conference, 2015
2014
Fault Injection Modeling Attacks on 65 nm Arbiter and RO Sum PUFs via Environmental Changes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
IEEE Trans. Computers, 2014
BLAKE-512-Based 128-Bit CCA2 Secure Timing Attack Resistant McEliece Cryptoprocessor.
IEEE Trans. Computers, 2014
NII Shonan Meet. Rep., 2014
RECTANGLE: A Bit-slice Ultra-Lightweight Block Cipher Suitable for Multiple Platforms.
IACR Cryptol. ePrint Arch., 2014
IACR Cryptol. ePrint Arch., 2014
IACR Cryptol. ePrint Arch., 2014
IACR Cryptol. ePrint Arch., 2014
IACR Cryptol. ePrint Arch., 2014
IACR Cryptol. ePrint Arch., 2014
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2014
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2014
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014
Proceedings of the Smart Card Research and Advanced Applications, 2014
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
2013
Proceedings of the Handbook of Signal Processing Systems, 2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
IEEE Trans. Educ., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Computers, 2013
IACR Cryptol. ePrint Arch., 2013
IACR Cryptol. ePrint Arch., 2013
Fault Injection Modeling Attacks on 65nm Arbiter and RO Sum PUFs via Environmental Changes.
IACR Cryptol. ePrint Arch., 2013
IACR Cryptol. ePrint Arch., 2013
IACR Cryptol. ePrint Arch., 2013
IACR Cryptol. ePrint Arch., 2013
Dietary Recommendations for Lightweight Block Ciphers: Power, Energy and Area Analysis of Recently Developed Architectures.
IACR Cryptol. ePrint Arch., 2013
Sancus: Low-cost Trustworthy Extensible Networked Devices with a Zero-software Trusted Computing Base.
Proceedings of the 22th USENIX Security Symposium, Washington, DC, USA, August 14-16, 2013, 2013
Proceedings of the Selected Areas in Cryptography - SAC 2013, 2013
A single-chip solution for the secure remote configuration of FPGAs using bitstream compression.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Proceedings of the 2013 IEEE International Conference on Microelectronic Systems Education, 2013
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 2013 ACM SIGSAC Conference on Computer and Communications Security, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Inf. Forensics Secur., 2012
IEEE Trans. Inf. Forensics Secur., 2012
IEEE Trans. Computers, 2012
Extending ECC-based RFID authentication protocols to privacy-preserving multi-party grouping proofs.
Pers. Ubiquitous Comput., 2012
J. Cryptogr. Eng., 2012
PUFs: Myth, Fact or Busted? A Security Evaluation of Physically Unclonable Functions (PUFs) Cast in Silicon (Extended Version).
IACR Cryptol. ePrint Arch., 2012
Three Phase Dynamic Current Mode Logic: A More Secure DyCML to Achieve a More Balanced Power Consumption.
Proceedings of the Information Security Applications - 13th International Workshop, 2012
Machine learning attacks on 65nm Arbiter PUFs: Accurate modeling poses strict bounds on usability.
Proceedings of the 2012 IEEE International Workshop on Information Forensics and Security, 2012
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2012
Proceedings of the Pairing-Based Cryptography - Pairing 2012, 2012
Proceedings of the Pairing-Based Cryptography - Pairing 2012, 2012
Proceedings of the 2012 International Symposium on System on Chip, 2012
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012
A systematic M safe-error detection in hardware implementations of cryptographic algorithms.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012
Reverse Fuzzy Extractors: Enabling Lightweight Mutual Authentication for PUF-Enabled RFIDs.
Proceedings of the Financial Cryptography and Data Security, 2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
Differential Scan Attack on AES with X-tolerant and X-masked Test Response Compactor.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
A scan-based attack on Elliptic Curve Cryptosystems in presence of industrial Design-for-Testability structures.
Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the Topics in Cryptology - CT-RSA 2012 - The Cryptographers' Track at the RSA Conference 2012, San Francisco, CA, USA, February 27, 2012
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2012
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012
PUFs: Myth, Fact or Busted? A Security Evaluation of Physically Unclonable Functions (PUFs) Cast in Silicon.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012
LiBrA-CAN: A Lightweight Broadcast Authentication Protocol for Controller Area Networks.
Proceedings of the Cryptology and Network Security, 11th International Conference, 2012
Proceedings of the Cryptography and Security: From Theory to Applications, 2012
Proceedings of the Advances in Cryptology - ASIACRYPT 2012, 2012
Interface Design for Mapping a Variety of RSA Exponentiation Algorithms on a HW/SW Co-design Platform.
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
2011
Trans. High Perform. Embed. Archit. Compil., 2011
Design and design methods for unified multiplier and inverter and its application for HECC.
Integr., 2011
IACR Cryptol. ePrint Arch., 2011
Proceedings of the Fourth ACM Conference on Wireless Network Security, 2011
Proceedings of the RFID. Security and Privacy - 7th International Workshop, 2011
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
Proceedings of the HOST 2011, 2011
Physically unclonable functions: manufacturing variability as an unclonable device identifier.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Proceedings of the 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2011
An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs.
Proceedings of the 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011
2010
Physically Unclonable Functions: A Study on the State of the Art and Future Research Directions.
Proceedings of the Towards Hardware-Intrinsic Security - Foundations and Practice, 2010
Anti-counterfeiting, Untraceability and Other Security Challenges for RFID Systems: Public-Key-Based Protocols and Hardware.
Proceedings of the Towards Hardware-Intrinsic Security - Foundations and Practice, 2010
Faster Interleaved Modular Multiplication Based on Barrett and Montgomery Reduction Methods.
IEEE Trans. Computers, 2010
Proceedings of the Third ACM Conference on Wireless Network Security, 2010
Proceedings of the Arithmetic of Finite Fields, Third International Workshop, 2010
Proceedings of the 19th USENIX Security Symposium, 2010
Proceedings of the Mobile Lightweight Wireless Systems, 2010
Proceedings of the Information Security - 13th International Conference, 2010
Proceedings of the HOST 2010, 2010
State-of-the-art of Secure ECC Implementations: A Survey on Known Side-channel Attacks and Countermeasures.
Proceedings of the HOST 2010, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the 2010 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2010
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
Proceedings of the Secure Integrated Circuits and Systems, 2010
Proceedings of the Secure Integrated Circuits and Systems, 2010
Proceedings of the Handbook of Signal Processing Systems, 2010
2009
IACR Cryptol. ePrint Arch., 2009
Proceedings of the First IEEE International Workshop on Information Forensics and Security, 2009
Practical Mitigations for Timing-Based Side-Channel Attacks on Modern x86 Processors.
Proceedings of the 30th IEEE Symposium on Security and Privacy (SP 2009), 2009
Proceedings of the ISSE 2009, 2009
Proceedings of the IEEE International Symposium on Information Theory, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
FPGA-based testing strategy for cryptographic chips: A case study on Elliptic Curve Processor for RFID tags.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Light-weight implementation options for curve-based cryptography: HECC is also ready for RFID.
Proceedings of the 4th International Conference for Internet Technology and Secured Transactions, 2009
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009
Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009
Proceedings of the 4th Workshop on Embedded Systems Security, 2009
2008
Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class.
J. Signal Process. Syst., 2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
IEEE Trans. Computers, 2008
Des. Autom. Embed. Syst., 2008
Proceedings of the 2008 ACM Workshop on Privacy in the Electronic Society, 2008
On the Practical Performance of Rateless Codes.
Proceedings of the WINSYS 2008, 2008
Proceedings of the Arithmetic of Finite Fields, 2nd International Workshop, 2008
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Proceedings of the Selected Areas in Cryptography, 15th International Workshop, SAC 2008, 2008
Proceedings of the Privacy Enhancing Technologies, 2008
Partition vs. Comparison Side-Channel Distinguishers: An Empirical Evaluation of Statistical Tests for Univariate Side-Channel Attacks against Two Unprotected CMOS Devices.
Proceedings of the Information Security and Cryptology, 2008
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008
Proceedings of the Fifth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Cryptographic Hardware and Embedded Systems, 2008
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
Lannoo, ISBN: 978-90-209-7809-4, 2008
2007
Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication.
IEEE Trans. Very Large Scale Integr. Syst., 2007
Multicore Curve-Based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2<sup>n</sup>).
IEEE Trans. Computers, 2007
Mob. Networks Appl., 2007
HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor.
Integr., 2007
EURASIP J. Adv. Signal Process., 2007
Comput. Electr. Eng., 2007
Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems.
Comput. Electr. Eng., 2007
A Compact Architecture for Montgomery Elliptic Curve Scalar Multiplication Processor.
Proceedings of the Information Security Applications, 8th International Workshop, 2007
Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations.
Proceedings of the Information Security Applications, 8th International Workshop, 2007
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007
Proceedings of the Fifth Annual IEEE International Conference on Pervasive Computing and Communications, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the IEEE International Conference on Acoustics, 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
ACM Trans. Design Autom. Electr. Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Computers, 2006
IEEE Trans. Computers, 2006
AES-Based Security Coprocessor IC in 0.18-$muhbox m$CMOS With Resistance to Differential Power Analysis Side-Channel Attacks.
IEEE J. Solid State Circuits, 2006
EURASIP J. Adv. Signal Process., 2006
Proceedings of the Third International Conference on Information Technology: New Generations (ITNG 2006), 2006
Proceedings of the Proceedings 2006 IEEE International Symposium on Information Theory, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the Security and Privacy in Ad-Hoc and Sensor Networks, 2006
Process Isolation for Reconfigurable Hardware.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006
Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006
2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE J. Solid State Circuits, 2005
Int. J. Embed. Syst., 2005
Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005
A Scalable and High Performance Elliptic Curve Processor with Resistance to Timing Attacks.
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Energy and Performance Analysis of Mapping Parallel Multithreaded Tasks for An On-Chip Multi-Processor System.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005
A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-µm CMOS technology.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip.
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing.
Proceedings of the 42nd Design Automation Conference, 2005
Cooperative multithreading on 3mbedded multiprocessor architectures enables energy-scalable design.
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the Topics in Cryptology, 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29, 2005
Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29, 2005
Side-channel aware design: Algorithms and Architectures for Elliptic Curve Cryptography over GF(2<sup>n</sup>).
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005
Proceedings of the Ambient Intelligence, 2005
2004
Design of portable biometric authenticators - energy, performance, and security tradeoffs.
IEEE Trans. Consumer Electron., 2004
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate.
IEEE J. Solid State Circuits, 2004
Charge Recycling Sense Amplifier Based Logic: Securing Low Power Security IC's against Differential Power Analysis.
IACR Cryptol. ePrint Arch., 2004
A Dynamic and Differential CMOS Logic Style to Resist Power and Timing Attacks on Security IC's.
IACR Cryptol. ePrint Arch., 2004
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Reducing radio energy consumption of key management protocols for wireless sensor networks.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004
Charge recycling sense amplifier based logic: securing low power security ICs against DPA [differential power analysis].
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing.
Proceedings of the 2004 Design, 2004
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation.
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
The happy marriage of architecture and application in next-generation reconfigurable systems.
Proceedings of the First Conference on Computing Frontiers, 2004
Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques.
Proceedings of the 2004 International Conference on Compilers, 2004
Proceedings of the Smart Card Research and Advanced Applications VI, 2004
Proceedings of the Ad-Hoc, Mobile, and Wireless Networks: Third International Conference, 2004
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing.
Proceedings of the Ultra Low-Power Electronics and Design, 2004
2003
IEEE J. Solid State Circuits, 2003
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
Proceedings of the 2003 ACM SIGMM Workshop on Biometrics Methods and Applications, 2003
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003
Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system.
Proceedings of the 40th Design Automation Conference, 2003
Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
Des. Autom. Embed. Syst., 2002
Proceedings of the Fourth IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2002), 2002
Proceedings of the 39th Design Automation Conference, 2002
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients.
Proceedings of the 39th Design Automation Conference, 2002
A 2.29 Gbits/sec, 56 mW non-pipelined Rijndael AES encryption IC in a 1.8 V, 0.18 μm CMOS technology.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002
A Security Protocol for Biometric Smart Cards.
Proceedings of the Fifth Smart Card Research and Advanced Application Conference, 2002
2001
Low power showdown: comparison of five DSP platforms implementing an LPC speech codec.
Proceedings of the IEEE International Conference on Acoustics, 2001
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the 38th Design Automation Conference, 2001
Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2001
2000
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
1998
1996
1995
J. VLSI Signal Process., 1995
J. VLSI Signal Process., 1995
1994
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994
Proceedings of the 31st Conference on Design Automation, 1994
1991
J. VLSI Signal Process., 1991
1988
IEEE J. Solid State Circuits, June, 1988
1987
Proceedings of the Advances in Cryptology, 1987