Ingrid Kovacs
Orcid: 0000-0002-6734-7207
According to our database1,
Ingrid Kovacs
authored at least 6 papers
between 2016 and 2024.
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Bibliography
2024
Frontend-Backend Integrated Circuit Device Linking Using Machine Learning Algorithms.
Proceedings of the 20th International Conference on Synthesis, 2024
2022
Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2020
A metamodel-based adaptive sampling approach for efficient failure region characterization of integrated circuits.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2017
An accurate yield estimation approach for multivariate non-normal data in semiconductor quality analysis.
Proceedings of the 14th International Conference on Synthesis, 2017
Integrated circuits' characterization for non-normal data in semiconductor quality analysis.
Proceedings of the 22nd IEEE European Test Symposium, 2017
2016
Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016