Ingo Sander
Orcid: 0000-0003-4859-3100
According to our database1,
Ingo Sander
authored at least 83 papers
between 1999 and 2024.
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Bibliography
2024
ACM Trans. Design Autom. Electr. Syst., 2024
Multi-objective preference-free exact design space exploration of static DSP on multicore platforms.
Proceedings of the Forum on Specification & Design Languages, 2024
Proceedings of the Forum on Specification & Design Languages, 2024
Automatic Parallelization of Embedded Software via Hierarchical Process Network Transformations.
Proceedings of the Forum on Specification & Design Languages, 2024
2023
2022
A multi-view and programming language agnostic framework for model-driven engineering.
Proceedings of the Forum on Specification & Design Languages, 2022
2021
ACM Trans. Embed. Comput. Syst., 2021
Integr., 2021
Classification and Mapping of Model Elements for Designing Runtime Reconfigurable Systems.
IEEE Access, 2021
Formulation of Design Space Exploration Problems by Composable Design Space Identification.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Simul., 2020
Proceedings of the Forum for Specification and Design Languages, 2020
2019
ACM Trans. Design Autom. Electr. Syst., 2019
Proceedings of the 2019 Forum for Specification and Design Languages, 2019
2018
Flexible and Tradeoff-Aware Constraint-Based Design Space Exploration for Streaming Applications on Heterogeneous Platforms.
ACM Trans. Design Autom. Electr. Syst., 2018
Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Proceedings of the Handbook of Hardware/Software Codesign., 2017
Designing end-to-end resource reservations in predictable distributed embedded systems.
Real Time Syst., 2017
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocess. Microsystems, 2017
SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems.
Microprocess. Microsystems, 2017
Throughput Propagation in Constraint-Based Design Space Exploration for Mixed-Criticality Systems.
Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Automatic construction of models for analytic system-level design space exploration problems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Simul., 2016
Proceedings of the 2016 Forum on Specification and Design Languages, 2016
SAFEPOWER Project: Architecture for Safe and Power-Efficient Mixed-Criticality Systems.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
2015
A formal, model-driven design flow for system simulation and multi-core implementation.
Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015
Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
An efficient joint analytical and simulation-based design space exploration flow for predictable multi-core systems.
Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2015
Customization of OpenCL applications for efficient task mapping under heterogeneous platform constraints.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
An extensible infrastructure for modeling and time analysis of predictable embedded systems.
Proceedings of the 2014 Forum on Specification and Design Languages, 2014
Proceedings of the 2014 Forum on Specification and Design Languages, 2014
A constraint-based design space exploration framework for real-time applications on MPSoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014
2013
Towards the generic reconfigurable accelerator: Algorithm development, core design, and performance analysis.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Rapid virtual prototyping of real-time systems using predictable platform characterizations.
Proceedings of the 2013 Forum on specification and Design Languages, 2013
Combining analytical and simulation-based design space exploration for time-critical systems.
Proceedings of the 2013 Forum on specification and Design Languages, 2013
Towards a Modelling and Design Framework for Mixed-Criticality SoCs and Systems-of-Systems.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
The RecoBlock SoC platform: a flexible array of reusable run-time-reconfigurable IP-blocks.
Proceedings of the Design, Automation and Test in Europe, 2013
System level synthesis of hardware for DSP applications using pre-characterized function implementations.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013
2012
Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications.
ACM Trans. Embed. Comput. Syst., 2012
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012
2011
Proceedings of the Industrial Embedded Systems (SIES), 2011
Semi-formal refinement of heterogeneous embedded systems by foreign model integration.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010
HetMoC: Heterogeneous Modelling in SystemC.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures.
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Application and Verification of Local Nonsemantic-Preserving Transformations in System Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Performance analysis of reconfiguration in adaptive real-time streaming applications.
Proceedings of the 6th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2008
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008
2007
Proceedings of the First Workshop on Verification of Adaptive Systems, 2007
Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures.
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.
Proceedings of the FPL 2007, 2007
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007
2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
2005
System level verification of digital signal processing applications based on the polynomial abstraction technique.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the Forum on specification and Design Languages, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
System modeling and transformational design refinement in ForSyDe [formal system design].
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits.
Proceedings of the 2004 Design, 2004
2003
Proceedings of the 2003 Design, 2003
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003
2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the 39th Design Automation Conference, 2002
2001
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001
2000
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000
1999
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999