Indrani Paul

According to our database, Indrani Paul authored at least 26 papers between 2002 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

AMD Ryzen 7040 Series.

Mahesh Subramony, David Kramer, Indrani Paul

IEEE Micro, 2024

2023

A Research Retrospective on AMD's Exascale Computing Journey.

Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Vignesh Adhinarayanan, Shaizeen Aga, Derrick Aguren, Varun Agrawal, Ashwin M. Aji, Johnathan Alsop, Paul T. Bauman, Bradford M. Beckmann, Majed Valad Beigi, Sergey Blagodurov, Travis Boraten, Michael Boyer, William C. Brantley, Noel Chalmers, Shaoming Chen, Kevin Cheng, Michael L. Chu, David Cownie, Nicholas Curtis, Joris Del Pino, Nam Duong, Alexandru Dutu, Yasuko Eckert, Christopher Erb, Chip Freitag, Joseph L. Greathouse, Sudhanva Gurumurthi, Anthony Gutierrez, Khaled Hamidouche, Sachin Hossamani, Wei Huang, Mahzabeen Islam, Nuwan Jayasena, John Kalamatianos, Onur Kayiran, Jagadish Kotra, Alan Lee, Daniel Lowell, Niti Madan, Abhinandan Majumdar, Nicholas Malaya, Srilatha Manne, Susumu Mashimo, Damon McDougall, Elliot Mednick, Michael Mishkin, Mark Nutter, Indrani Paul, Matthew Poremba, Brandon Potter, Kishore Punniyamurthy, Sooraj Puthoor, Steven E. Raasch, Karthik Rao, Gregory Rodgers, Marko Scrbak, Mohammad Seyedzadeh, John Slice, Vilas Sridharan, René van Oostrum, Eric Van Tassell, Abhinav Vishnu, Samuel Wasmundt, Mark Wilkening, Noah Wolfe, Mark Wyse, Adithya Yalavarti, Dmitri Yudanov

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

AMD Ryzen^™ 7040 Series: Technology Overview.

Mahesh Subramon, David Kramer, Indrani Paul

Proceedings of the 35th IEEE Hot Chips Symposium, 2023

2018

Implications of Integrated CPU-GPU Processors on Thermal and Power Management Techniques.

Kapil Dev, Indrani Paul, Wei Huang, Yasuko Eckert, Wayne P. Burleson, Sherief Reda

CoRR, 2018

2017

Ti-States: Power Management in Active Timing Margin Processors.

Yazhou Zu, Wei Huang, Indrani Paul, Vijay Janapa Reddi

IEEE Micro, 2017

Design and Analysis of an APU for Exascale Computing.

Thiruvengadam Vijayaraghavan, Yasuko Eckert, Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Bradford M. Beckmann, William C. Brantley, Joseph L. Greathouse, Wei Huang, Arun Karunanithi, Onur Kayiran, Mitesh R. Meswani, Indrani Paul, Matthew Poremba, Steven Raasch, Steven K. Reinhardt, Greg Sadowski, Vilas Sridharan

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Dynamic GPGPU Power Management Using Adaptive Model Predictive Control.

Abhinandan Majumdar, Leonardo Piga, Indrani Paul, Joseph L. Greathouse, Wei Huang, David H. Albonesi

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

A framework for evaluating promising power efficiency techniques in future GPUs for HPC.

Kapil Dev, Indrani Paul, Wei Huang

Proceedings of the 24th High Performance Computing Symposium, 2016

Ti-states: Processor power management in the temperature inversion region.

Yazhou Zu, Wei Huang, Indrani Paul, Vijay Janapa Reddi

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Workload-Aware Power Gating Design and Run-Time Management for Massively Parallel GPGPUs.

Kapil Dev, Sherief Reda, Indrani Paul, Wei Huang, Wayne P. Burleson

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Measuring and modeling on-chip interconnect power on real hardware.

Vignesh Adhinarayanan, Indrani Paul, Joseph L. Greathouse, Wei Huang, Ashutosh Pattnaik, Wu-chun Feng

Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

Performance Boosting Opportunities under Communication Imbalance in Power-Constrained HPC Clusters.

Leonardo Piga, Indrani Paul, Wei Huang

Proceedings of the 45th International Conference on Parallel Processing, 2016

VR-scale: runtime dynamic phase scaling of processor voltage regulators for improving power efficiency.

Hadi Asghari Moghaddam, Hamid Reza Ghasemi, Abhishek Arvind Sinkar, Indrani Paul, Nam Sung Kim

Proceedings of the 53rd Annual Design Automation Conference, 2016

A Case for Criticality Models in Exascale Systems.

Brian Kocoloski, Leonardo Piga, Wei Huang, Indrani Paul, John R. Lange

Proceedings of the 2016 IEEE International Conference on Cluster Computing, 2016

2015

Coordinated power management in heterogeneous processors.

Indrani Paul

PhD thesis, 2015

Achieving Exascale Capabilities through Heterogeneous Computing.

Michael J. Schulte, Mike Ignatowski, Gabriel H. Loh, Bradford M. Beckmann, William C. Brantley, Sudhanva Gurumurthi, Nuwan Jayasena, Indrani Paul, Steven K. Reinhardt, Gregory Rodgers

IEEE Micro, 2015

Harmonia: balancing compute and memory power in high-performance GPUs.

Indrani Paul, Wei Huang, Manish Arora, Sudhakar Yalamanchili

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

A Taxonomy of GPGPU Performance Scaling.

Abhinandan Majumdar, Gene Y. Wu, Kapil Dev, Joseph L. Greathouse, Indrani Paul, Wei Huang, Arjun-Karthik Venugopal, Leonardo Piga, Chip Freitag, Sooraj Puthoor

Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015

Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems.

Manish Arora, Srilatha Manne, Indrani Paul, Nuwan Jayasena, Dean M. Tullsen

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014

Coordinated energy management in heterogeneous processors.

Indrani Paul, Vignesh T. Ravi, Srilatha Manne, Manish Arora, Sudhakar Yalamanchili

Sci. Program., 2014

A comparison of core power gating strategies implemented in modern hardware.

Manish Arora, Srilatha Manne, Yasuko Eckert, Indrani Paul, Nuwan Jayasena, Dean M. Tullsen

Proceedings of the ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, 2014

2013

Cooperative boosting: needy versus greedy power management.

Indrani Paul, Srilatha Manne, Manish Arora, William Lloyd Bircher, Sudhakar Yalamanchili

Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

Performance boosting under reliability and power constraints.

Youngtaek Kim, Lizy Kurian John, Indrani Paul, Srilatha Manne, Michael J. Schulte

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2012

Performance impact of virtual machine placement in a datacenter.

Indrani Paul, Sudhakar Yalamanchili, Lizy K. John

Proceedings of the 31st IEEE International Performance Computing and Communications Conference, 2012

2002

Efficient Implementation of Packet Scheduling Algorithm on High-Speed Programmable Network Processors.

Weidong Shi, Xiaotong Zhuang, Indrani Paul, Karsten Schwan

Proceedings of the Management of Multimedia on the Internet, 2002

Algorithms for Switch-Scheduling in the Multimedia Router for LANs.

Indrani Paul, Sudhakar Yalamanchili, José Duato

Proceedings of the High Performance Computing, 2002