Imran Hafeez Abbassi
Orcid: 0000-0002-3950-6725
According to our database1,
Imran Hafeez Abbassi
authored at least 8 papers
between 2016 and 2022.
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Bibliography
2022
ForASec: Formal Analysis of Hardware Trojan-Based Security Vulnerabilities in Sequential Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2019
Using gate-level side channel parameters for formally analyzing vulnerabilities in integrated circuits.
Sci. Comput. Program., 2019
TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
CoRR, 2018
McSeVIC: A Model Checking Based Framework for Security Vulnerability Analysis of Integrated Circuits.
IEEE Access, 2018
Proceedings of the 14th IEEE/ASME International Conference on Mechatronic and Embedded Systems and Applications, 2018
2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Formal Verification of Gate-Level Multiple Side Channel Parameters to Detect Hardware Trojans.
Proceedings of the Formal Techniques for Safety-Critical Systems, 2016