Ilya Issenin

According to our database, Ilya Issenin authored at least 17 papers between 2002 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Partially Protected Caches to Reduce Failures Due to Soft Errors in Multimedia Applications.

Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt, Nalini Venkatasubramanian

IEEE Trans. Very Large Scale Integr. Syst., 2009

Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures.

Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt, Sanghyun Park, Yunheung Paek

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications.

Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Minwook Ahn, Yunheung Paek

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008

Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications.

Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Using FORAY Models to Enable MPSoC Memory Optimizations.

Ilya Issenin, Nikil D. Dutt

Int. J. Parallel Program., 2008

Compiler driven data layout optimization for regular/irregular array access patterns.

Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Yunheung Paek, SunJun Ko

Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, 2008

A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures.

Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

DRDU: A data reuse analysis technique for efficient scratch-pad memory management.

Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil D. Dutt

ACM Trans. Design Autom. Electr. Syst., 2007

Data Reuse Driven Memory and Network-On-Chip Co-Synthesis.

Ilya Issenin, Nikil D. Dutt

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Software controlled memory layout reorganization for irregular array access patterns.

Doosan Cho, Ilya Issenin, Nikil D. Dutt, Jonghee W. Yoon, Yunheung Paek

Proceedings of the 2007 International Conference on Compilers, 2007

2006

Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies.

Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt

Proceedings of the 43rd Design Automation Conference, 2006

Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications.

Ilya Issenin, Nikil D. Dutt

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

Mitigating soft error failures for multimedia applications by selective data protection.

Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt, Nalini Venkatasubramanian

Proceedings of the 2006 International Conference on Compilers, 2006

2005

FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations.

Ilya Issenin, Nikil D. Dutt

Proceedings of the 2005 Design, 2005

Compilation techniques for energy reduction in horizontally partitioned cache architectures.

Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt

Proceedings of the 2005 International Conference on Compilers, 2005

2004

Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies.

Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil D. Dutt

Proceedings of the 2004 Design, 2004

2002

Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints.

Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau

Proceedings of the 2002 Design, 2002