Ilkka Saastamoinen

According to our database1, Ilkka Saastamoinen authored at least 9 papers between 2000 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2009
Minimizing area costs in GPS applications on a programmable DSP by code compression.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2008
Code compression in DSP processor systems.
Int. J. Embed. Syst., 2008

2005
On second order statistics of the satellite-to-indoor channel based on field measurements.
Proceedings of the IEEE 16th International Symposium on Personal, 2005

2003
Buffer implementation for Proteo network-on-chip.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Variable-Length Instruction Compression for Area Minimization.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

An IP-Based On-Chip Packet-Switched Network.
Proceedings of the Networks on Chip, 2003

2002
Advanced Instruction Set Architectures for Reducing Program Memory Usage in a DSP Processor.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

Interconnect IP Node for Future System-on-Chip Designs.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

2000
VHDL-based implementations of area and power efficient filter architectures.
Proceedings of the 10th European Signal Processing Conference, 2000


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