Il Hwan Cho

Orcid: 0000-0002-5173-7868

According to our database¹, Il Hwan Cho authored at least 4 papers between 2013 and 2023.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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2023

3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer.

[BibT_eX]

[DOI]

IEEE Access, 2023

2022

Investigation of Poly Silicon Channel Variation in Vertical 3D NAND Flash Memory.

[BibT_eX]

[DOI]

IEEE Access, 2022

2018

Fabrication and Characterization of a Fully Si Compatible Forming-Free GeOxResistive Switching Random-Access Memory.

[BibT_eX]

[DOI]

Proceedings of the 76th Device Research Conference, 2018

2013

Modeling of Triangular Sacrificial Layer Residue Effect in Nano-Electro-Mechanical Nonvolatile Memory.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2013

Il Hwan Cho

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