Igor Böhm

According to our database1, Igor Böhm authored at least 9 papers between 2010 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2020
Fast and Correct Load-Link/Store-Conditional Instruction Handling in DBT Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
Mitigating JIT compilation latency in virtual execution environments.
Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2019

2013
Speeding up dynamic compilation : concurrent and parallel dynamic compilation.
PhD thesis, 2013

A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation.
Int. J. Parallel Program., 2013

2012
Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2012

2011
Scalable multi-core simulation using parallel dynamic binary translation.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Generalized just-in-time trace compilation using a parallel task farm in a dynamic binary translator.
Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, 2011

2010
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bit instructions.
Proceedings of the CGO 2010, 2010


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