Ignatius Bezzam

Orcid: 0000-0002-8565-1907

According to our database1, Ignatius Bezzam authored at least 10 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A Resonant Time-Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture for MAC Operations.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023
Design Automation of Series Resonance Clocking in 14-nm FinFETs.
Circuits Syst. Signal Process., December, 2023

Resonant Compute-In-Memory (rCIM) 10T SRAM Macro for Boolean Logic.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

2022
Power and Skew Reduction Using Resonant Energy Recycling in 14-nm FinFET Clocks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Resonant Energy Recycling SRAM Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2015
An Energy-Recovering Reconfigurable Series Resonant Clocking Scheme for Wide Frequency Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
Minimizing Power and Skew in VLSI-SoC Clocking with Pulsed Resonance Driven De-skewing Latches.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

A pulsed resonance clocking for energy recovery.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Low power low voltage wide frequency resonant clock and data circuits for power reductions.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

2012
Low power SoCs with resonant dynamic logic using inductors for energy recovery.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012


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