Ignatius Bezzam
Orcid: 0000-0002-8565-1907
According to our database1,
Ignatius Bezzam
authored at least 10 papers
between 2012 and 2024.
Collaborative distances:
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Bibliography
2024
A Resonant Time-Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture for MAC Operations.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
2023
Circuits Syst. Signal Process., December, 2023
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2015
An Energy-Recovering Reconfigurable Series Resonant Clocking Scheme for Wide Frequency Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
2014
Minimizing Power and Skew in VLSI-SoC Clocking with Pulsed Resonance Driven De-skewing Latches.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Low power low voltage wide frequency resonant clock and data circuits for power reductions.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
2012
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012