Ignacio Lacadena

According to our database1, Ignacio Lacadena authored at least 3 papers between 1998 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2001
A temporal bipartitioning algorithm for dynamically reconfigurable FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2001

2000
Implementation of Virtual Circuits by Means of the FIPSOC Devices.
Proceedings of the Field-Programmable Logic and Applications, 2000

1998
Programmable analog hardware: a case study.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998


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