Ignacio Garcia-Vargas

Orcid: 0000-0001-8420-8770

According to our database1, Ignacio Garcia-Vargas authored at least 13 papers between 1997 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Optimization based on the minimum maximal k-partial-matching problem of finite states machines with input multiplexing.
Des. Autom. Embed. Syst., 2022

2021
Methodology for Distributed-ROM-Based Implementation of Finite State Machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2018
High-Performance Architecture for Binary-Tree-Based Finite State Machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

2016
Minimum maximum reconfiguration cost problem.
Optim. Lett., 2016

2015
Finite State Machines With Input Multiplexing: A Performance Study.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

High-Speed and Area-Efficient Reconfigurable Multiplexer Bank for RAM-Based Finite State Machine Implementations.
J. Circuits Syst. Comput., 2015

2013
The minimum maximal k-partial-matching problem.
Optim. Lett., 2013

2012
Finite Virtual State Machines.
IEICE Trans. Inf. Syst., 2012

Performance evaluation of RAM-based implementation of Finite State Machines in FPGAs.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2007
FPGA-Based Implementation of RAM with Asymmetric Port Widths for Run-Time Reconfiguration.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2003
Synthetic generation of address-events for real-time image processing.
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003

1999
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips.
Int. J. Circuit Theory Appl., 1999

1997
An algorithm for numerical reference generation in symbolic analysis of large analog circuits.
Proceedings of the European Design and Test Conference, 1997


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