Ichiro Kuroda

According to our database1, Ichiro Kuroda authored at least 36 papers between 1985 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2008
Special Section on Signal Processing for Audio and Visual Systems and Its Implementations.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

2007
Media Processing LSI Architectures for Automotives - Challenges and Future Trends - .
IEICE Trans. Electron., 2007

2006
Special Section on Papers Selected from the 20th Symposium on Signal Processing.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

2005
QVGA/CIF Resolution MPEG-4 Video Codec Based on a Low-Power and General-Purpose DSP.
J. VLSI Signal Process., 2005

Performance Evaluation of the AV CODEC on a Low-Power SPXK5SC DSP Core.
IEICE Trans. Inf. Syst., 2005

Fast and accurate motion estimation algorithm by adaptive search range and shape selection.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2004
A 51.2 GOPS Programmable Video Recognition Processor for Vision-Based Intelligent Cruise Control Applications.
IEICE Trans. Inf. Syst., 2004

A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication.
Proceedings of the 41th Design Automation Conference, 2004

2003
A 51.2-GOPS scalable video recognition processor for intelligent cruise control based on a linear array of 128 four-way VLIW processing elements.
IEEE J. Solid State Circuits, 2003

Optimization of decision-timing for early termination of SSDA-based block matching.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2002
VLIW DSP for mobile applications.
IEEE Signal Process. Mag., 2002

Asynchronous Multirate Real-Time Scheduling for Programmable DSPs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2001
MPEG-2 AAC 5.1-Channel Decoder Software for a Low-Power Embedded RISC Microprocessor.
J. VLSI Signal Process., 2001

Real-Time Software Video Codec with a Fast Adaptive Motion Vector Search.
J. VLSI Signal Process., 2001

Guest Editors' Introduction.
J. VLSI Signal Process., 2001

Multimedia Signal Processor For Mobile Applications.
Proceedings of the 2001 IEEE International Conference on Multimedia and Expo, 2001

A low-power programmable DSP core architecture for 3G mobile terminals.
Proceedings of the IEEE International Conference on Acoustics, 2001

2000
Hardware/software codesign of finite field datapath for low-energy Reed-Solomon codecs.
IEEE Trans. Very Large Scale Integr. Syst., 2000

1999
A 2000-MOPS embedded RISC processor with a Rambus DRAM controller.
IEEE J. Solid State Circuits, 1999

Radix-4 FFT implementation using SIMD multimedia instructions.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1998
Multimedia processors.
Proc. IEEE, 1998

V830R/AV: embedded multimedia superscalar RISC processor.
IEEE Micro, 1998

An 800-MOPS, 110-mW, 1.5-V, parallel DSP for mobile multimedia processing.
IEEE J. Solid State Circuits, 1998

Low-energy heterogeneous digit-serial Reed-Solomon codecs.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

H.263 mobile video codec based on a low power consumption digital signal processor.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Software MPEG-2 video decoder on a 200-MHz, low-power multimedia microprocessor.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Fast 2D IDCT implementation with multimedia instructions for a software MPEG2 decoder.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

1997
Code positioning to reduce instruction cache misses in signal processing applications on multimedia RISC processors.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1996
A fast full-search motion estimation method for programmable processors with a multiply-accumulator.
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

1995
Low-power multimedia RISC.
IEEE Micro, 1995

1992
Asynchronous multirate system design for programmable DSPs.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

A reconfigurable processor array with routing LSIs and general purpose DSPs.
Proceedings of the Application Specific Array Processors, 1992

1987
A CCITT standard 32 kbit/s ADPCM LSI codec.
IEEE Trans. Acoust. Speech Signal Process., 1987

Blockdiagram programming system for 32 bit floating point signal processor.
Proceedings of the IEEE International Conference on Acoustics, 1987

1986
Advanced single-chip signal processor.
Proceedings of the IEEE International Conference on Acoustics, 1986

1985
A CCITT standard 32 kbps ADPCM LSI codec.
Proceedings of the IEEE International Conference on Acoustics, 1985


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