Ian Post

According to our database1, Ian Post authored at least 16 papers between 2007 and 2022.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Combinatorial Algorithms for Rooted Prize-Collecting Walks and Applications to Orienteering and Minimum-Latency Problems.
Proceedings of the Integer Programming and Combinatorial Optimization, 2022

2018
A (1+ε)-Embedding of Low Highway Dimension Graphs into Bounded Treewidth Graphs.
SIAM J. Comput., 2018

2015
The Simplex Method is Strongly Polynomial for Deterministic Markov Decision Processes.
Math. Oper. Res., 2015

Linear Programming-based Approximation Algorithms for Multi-Vehicle Minimum Latency Problems (Extended Abstract).
Proceedings of the Twenty-Sixth Annual ACM-SIAM Symposium on Discrete Algorithms, 2015

2014
Linear-Programming based Approximation Algorithms for Multi-Vehicle Minimum Latency Problems.
CoRR, 2014

2013
Online Submodular Welfare Maximization: Greedy is Optimal.
Proceedings of the Twenty-Fourth Annual ACM-SIAM Symposium on Discrete Algorithms, 2013

2012
Some applications of duality and flows : algorithms for network design and deterministic Markov decision processes.
PhD thesis, 2012

One Tree Suffices: A Simultaneous O(1)-Approximation for Single-Sink Buy-at-Bulk.
Theory Comput., 2012

Online and stochastic variants of welfare maximization
CoRR, 2012

Single pass sparsification in the streaming model with edge deletions
CoRR, 2012

Optimal bandwidth-aware VM allocation for Infrastructure-as-a-Service
CoRR, 2012

Embedding Paths into Trees: VM Placement to Minimize Congestion.
Proceedings of the Algorithms - ESA 2012, 2012

2010
Liquidity in Credit Networks: A Little Trust Goes a Long Way.
Proceedings of the 2010 Workshop on the Economics of Networks, Systems, and Computation, 2010

2009
An Oblivious O(1)-Approximation for Single Source Buy-at-Bulk.
Proceedings of the 50th Annual IEEE Symposium on Foundations of Computer Science, 2009

2008
A 1.1 GHz 12 µA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications.
IEEE J. Solid State Circuits, 2008

2007
A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007


  Loading...