I. Mori

According to our database, I. Mori authored at least 1 paper in 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

Accurate error bit mode analysis of STT-MRAM chip with a novel current measurement module implemented to gigabit class memory test system.

Ryo Tamura, I. Mori, N. Watanabe, Hiroki Koike, Tetsuo Endoh

Proceedings of the Non-Volatile Memory Technology Symposium, 2018