I. Hariharan

Orcid: 0000-0002-8548-4256

According to our database1, I. Hariharan authored at least 3 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Hardware implementation of approximate multipliers for signal processing applications.
Int. J. Wirel. Mob. Comput., 2022

2021
Algorithms for reducing reconfiguration overheads using prefetch, reuse, and optimal mapping of tasks.
Concurr. Comput. Pract. Exp., 2021

2019
Efficient Use of On-Chip Memories and Scheduling Techniques to Eliminate the Reconfiguration Overheads in Reconfigurable Systems.
J. Circuits Syst. Comput., 2019


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