I-Ching Tsai

According to our database, I-Ching Tsai authored at least 5 papers between 2010 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

IR-drop and Routing Congestion Aware PDN Refinement Framework for Timing Optimization.

Yu-Guang Chen, Hung-Han Chang, Yu-Chuan Liang, Wen-Hsiang Chang, I-Ching Tsai, Chih-Wei Lin, Yun-Chih Chang, Mango Chia-Tso Chao

Proceedings of the 21st International SoC Design Conference, 2024

2022

Path-Based Pre-Routing Timing Prediction for Modern Very Large-Scale Integration Designs.

Li-Wei Chen, Yao-Nien Sui, Tai-Cheng Lee, Yih-Lang Li, Mango C.-T. Chao, I-Ching Tsai, Tai-Wei Kung, En-Cheng Liu, Yun-Chih Chang

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

A Reinforcement Learning Agent for Obstacle-Avoiding Rectilinear Steiner Tree Construction.

Po-Yan Chen, Bing-Ting Ke, Tai-Cheng Lee, I-Ching Tsai, Tai-Wei Kung, Li-Yi Lin, En-Cheng Liu, Yun-Chih Chang, Yih-Lang Li, Mango C.-T. Chao

Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

2012

A fast heuristic approach for parametric yield enhancement of analog designs.

Chien-Nan Jimmy Liu, Yen-Lung Chen, Chin-Cheng Kuo, I-Ching Tsai

ACM Trans. Design Autom. Electr. Syst., 2012

2010

Behavior-level yield enhancement approach for large-scaled analog circuits.

Chin-Cheng Kuo, Yen-Lung Chen, I-Ching Tsai, Li-Yu Chan, Chien-Nan Jimmy Liu

Proceedings of the 47th Design Automation Conference, 2010