Hyunmin Jeong

Orcid: 0000-0001-7824-0993

According to our database1, Hyunmin Jeong authored at least 8 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Polarization Diversity and Transfer Learning-Based Modulation Optimization for High-Speed Dual Channel MIMO Backscatter Communication.
IEEE Internet Things J., June, 2024


2023
AutoScaleDSE: A Scalable Design Space Exploration Engine for High-Level Synthesis.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

2022
ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

ScaleHLS: a scalable high-level synthesis framework with multi-level transformations and optimizations: invited.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow.
IEEE Trans. Computers, 2021

ScaleHLS: Scalable High-Level Synthesis through MLIR.
CoRR, 2021

TwinDNN: A Tale of Two Deep Neural Networks.
Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021


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