Hyung Dong Lee

According to our database1, Hyung Dong Lee authored at least 4 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
First Demonstration of Fully Integrated 16 nm Half-Pitch Selector Only Memory (SOM) for Emerging CXL Memory.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Improvement of MAC Accuracy using Oxygen Diffusion Barriers in Resistive Synaptic Cell Arrays.
Proceedings of the IEEE International Memory Workshop, 2024

Modeling and Demonstration for Multi-level Weight Conductance in Computational FeFET Memory Cell.
Proceedings of the IEEE International Memory Workshop, 2024

2022
Structural and Device Considerations for Vertical Cross Point Memory with Single-stack Memory toward CXL Memory beyond 1x nm 3DXP.
Proceedings of the IEEE International Memory Workshop, 2022


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