Hyun Kim
Orcid: 0000-0002-7962-657XAffiliations:
- Seoul National University of Science and Technology, Department of Electrical and Information Engineering, Seoul, South Korea
According to our database1,
Hyun Kim
authored at least 67 papers
between 2011 and 2025.
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Online presence:
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Bibliography
2025
MCM-SR: Multiple Constant Multiplication-Based CNN Streaming Hardware Architecture for Super-Resolution.
IEEE Trans. Very Large Scale Integr. Syst., January, 2025
2024
Mobile-X: Dedicated FPGA Implementation of the MobileNet Accelerator Optimizing Depthwise Separable Convolution.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2024
Survey of convolutional neural network accelerators on field-programmable gate array platforms: architectures and optimization techniques.
J. Real Time Image Process., May, 2024
Trunk Pruning: Highly Compatible Channel Pruning for Convolutional Neural Networks Without Fine-Tuning.
IEEE Trans. Multim., 2024
USD: Uncertainty-Based One-Phase Learning to Enhance Pseudo-Label Reliability for Semi-Supervised Object Detection.
IEEE Trans. Multim., 2024
A survey of FPGA and ASIC designs for transformer inference acceleration and optimization.
J. Syst. Archit., 2024
IEEE Access, 2024
HLQ: Hardware-Friendly Logarithmic Quantization Aware Training for Power-Efficient Low-Precision CNN Models.
IEEE Access, 2024
Hardware-aware Network Compression for Hybrid Vision Transformer via Low-Rank Approximation.
Proceedings of the 21st International SoC Design Conference, 2024
EDeN: Enabling Low-Power CNN Inference on Edge Devices Using Prefetcher-assisted NVM Systems.
Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024
HyQ: Hardware-Friendly Post-Training Quantization for CNN-Transformer Hybrid Networks.
Proceedings of the Thirty-Third International Joint Conference on Artificial Intelligence, 2024
Extreme Pruning Technique Based on Filter Deactivation Using Sparsity Training for Deep Convolutional Neural Networks.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024
An Architecture-Level Framework for Enabling Processing-Using-Memory Simulations in Deep Neural Networks.
Proceedings of the International Conference on Electronics, Information, and Communication, 2024
PF-Training: Parameter Freezing for Efficient On-Device Training of CNN-based Object Detectors in Low-Resource Environments.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023
An In-Module Disturbance Barrier for Mitigating Write Disturbance in Phase-Change Memory.
IEEE Trans. Computers, April, 2023
FP-AGL: Filter Pruning With Adaptive Gradient Learning for Accelerating Deep Convolutional Neural Networks.
IEEE Trans. Multim., 2023
Multi-Step Training Framework Using Sparsity Training for Efficient Utilization of Accumulated New Data in Convolutional Neural Networks.
IEEE Access, 2023
V-SKP: Vectorized Kernel-Based Structured Kernel Pruning for Accelerating Deep Convolutional Neural Networks.
IEEE Access, 2023
CP-CNN: Computational Parallelization of CNN-Based Object Detectors in Heterogeneous Embedded Systems for Autonomous Driving.
IEEE Access, 2023
Proceedings of the 20th International SoC Design Conference, 2023
RepSGD: Channel Pruning Using Reparamerization for Accelerating Convolutional Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the International Conference on Electronics, Information, and Communication, 2023
AGT: Channel Pruning Using Adaptive Gradient Training for Accelerating Convolutional Neural Networks.
Proceedings of the International Conference on Electronics, Information, and Communication, 2023
Characterizing Memory Access Patterns of Various Convolutional Neural Networks for Utilizing Processing-in-Memory.
Proceedings of the International Conference on Electronics, Information, and Communication, 2023
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
PPT-KP: Pruning Point Training-based Kernel Pruning for Deep Convolutional Neural Networks.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
WL-WD: Wear-Leveling Solution to Mitigate Write Disturbance Errors for Phase-Change Memory.
IEEE Access, 2022
PCMCsim: An Accurate Phase-Change Memory Controller Simulator and its Performance Analysis.
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022
Performance Analysis of a Phase-Change Memory System on Various CNN Inference Workloads.
Proceedings of the 19th International SoC Design Conference, 2022
Activation Distribution-based Layer-wise Quantization for Convolutional Neural Networks.
Proceedings of the International Conference on Electronics, Information, and Communication, 2022
2021
Layer-Specific Optimization for Mixed Data Flow With Mixed Precision in FPGA Design for CNN-Based Object Detectors.
IEEE Trans. Circuits Syst. Video Technol., 2021
RL-SPIHT: Reinforcement Learning-Based Adaptive Selection of Compression Ratios for 1-D SPIHT Algorithm.
IEEE Access, 2021
CNN-Based Mask-Pose Fusion for Detecting Specific Persons on Heterogeneous Embedded Systems.
IEEE Access, 2021
Zero-Centered Fixed-Point Quantization With Iterative Retraining for Deep Convolutional Neural Network-Based Object Detectors.
IEEE Access, 2021
Cache Compression with Golomb-Rice Code and Quantization for Convolutional Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
DC-AC: Deep Correlation-Based Adaptive Compression of Feature Map Planes in Convolutional Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement.
IEEE Trans. Very Large Scale Integr. Syst., 2020
An Efficient Sampling Algorithm With a K-NN Expanding Operator for Depth Data Acquisition in a LiDAR System.
IEEE Trans. Circuits Syst. Video Technol., 2020
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
CoRR, 2020
Proceedings of the International SoC Design Conference, 2020
Proceedings of the International SoC Design Conference, 2020
PCM: Precision-Controlled Memory System for Energy Efficient Deep Neural Network Training.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
A High-Throughput and Power-Efficient FPGA Implementation of YOLO CNN for Object Detection.
IEEE Trans. Very Large Scale Integr. Syst., 2019
A High-Throughput Hardware Accelerator for Lossless Compression of a DDR4 Command Trace.
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Trans. Computers, 2019
IEEE Trans. Computers, 2019
IEEE Access, 2019
Gaussian YOLOv3: An Accurate and Fast Object Detector Using Localization Uncertainty for Autonomous Driving.
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision, 2019
Proceedings of the International Conference on Electronics, Information, and Communication, 2019
2018
SPIHT Algorithm With Adaptive Selection of Compression Ratio Depending on DWT Coefficients.
IEEE Trans. Multim., 2018
IEEE Trans. Consumer Electron., 2018
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
An Approximate Memory Architecture for a Reduction of Refresh Power Consumption in Deep Learning Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
A low-power surveillance video coding system with early background subtraction and adaptive frame memory compression.
IEEE Trans. Consumer Electron., 2017
Proceedings of the International SoC Design Conference, 2017
2016
A Low-Power Video Recording System With Multiple Operation Modes for H.264 and Light-Weight Compression.
IEEE Trans. Multim., 2016
An adaptive selection of an SRAM cell size for power reduction in an H.264/AVC encoder.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Displays, 2015
2014
A low-power hybrid video recording system with H.264/AVC and light-weight compression.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014
2013
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013
Proceedings of the IEEE International Conference on Consumer Electronics, 2013
2012
An inter-frame macroblock schedule for memory access reduction in H.264/AVC bi-directional prediction.
Proceedings of the International SoC Design Conference, 2012
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011