Hyongmin Lee
According to our database1,
Hyongmin Lee
authored at least 10 papers
between 2011 and 2022.
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Bibliography
2022
A 3nm GAAFET Analog Assisted Digital LDO with High Current Density for Dynamic Voltage Scaling Mobile Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2016
A CMOS analog front-end for driving a high-speed SAR ADC in low-power ultrasound imaging systems.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016
2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
A 9-bit, 110-MS/s pipelined-SAR ADC using time-interleaved technique with shared comparator.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015
2013
A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013
2011
A 4.8Gb/s impedance-matched bidirectional multi-drop transceiver for high-capacity memory interface.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
A CMOs readout integrated circuit with wide dynamic range for a CNT bio-sensor array system.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
A low-power referenceless clock and data recovery circuit with clock-edge modulation for biomedical sensor applications.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011