Hyochan An

Orcid: 0000-0002-6322-025X

According to our database1, Hyochan An authored at least 13 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices.
IEEE J. Solid State Circuits, October, 2024

RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM.
IEEE J. Solid State Circuits, August, 2024

2023
A Reconfigurable Analog FIR Filter Achieving -70dB Rejection with Sharp Transition for Narrowband Receivers.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

An 8.09TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022
A Power-Efficient Brain-Machine Interface System With a Sub-mw Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates.
IEEE Trans. Biomed. Circuits Syst., 2022

Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021
An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks.
IEEE J. Solid State Circuits, 2021

14.1-ENOB 184.9dB-FoM Capacitor-Array-Assisted Cascaded Charge-Injection SAR ADC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
1.03pW/b Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent Edge Processors.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019
A 1.74.12 mm<sup>3</sup> Fully Integrated pH Sensor for Implantable Applications using Differential Sensing and Drift-Compensation.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019


  Loading...