Hyo-Sig Won
According to our database1,
Hyo-Sig Won
authored at least 9 papers
between 2003 and 2017.
Collaborative distances:
Collaborative distances:
Timeline
2004
2006
2008
2010
2012
2014
2016
0
1
2
3
4
1
3
1
2
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2017
Non-linear library characterization method for FinFET logic cells by L1-minimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A 14 nm FinFET 128 Mb SRAM With V<sub>MIN</sub> Enhancement Techniques for Low-Power Applications.
IEEE J. Solid State Circuits, 2015
2012
Proceedings of the International SoC Design Conference, 2012
2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003