Hwa-Yi Tseng

According to our database1, Hwa-Yi Tseng authored at least 2 papers between 2017 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2018
Performance-preserved analog routing methodology via wire load reduction.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Layout placement optimization with isolation rings for high-voltage VLSI circuits.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017


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