Hun-Seok Kim

Orcid: 0000-0002-6658-5502

According to our database1, Hun-Seok Kim authored at least 129 papers between 2006 and 2024.

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Bibliography

2024
Canalis: A Throughput-Optimized Framework for Real-Time Stream Processing of Wireless Communication.
ACM Trans. Reconfigurable Technol. Syst., December, 2024

AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices.
IEEE J. Solid State Circuits, October, 2024

RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM.
IEEE J. Solid State Circuits, August, 2024

mSAIL: Milligram-Scale Multi-Modal Sensor Platform for Monarch Butterfly Migration Tracking.
Commun. ACM, June, 2024

A Sub-mm<sup>3</sup> Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry.
IEEE J. Solid State Circuits, April, 2024

FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs).
IEEE Des. Test, February, 2024

A 1.5-μW Fully-Integrated Keyword Spotting SoC in 28-nm CMOS With Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping.
IEEE J. Solid State Circuits, January, 2024

BLAST: Block-Level Adaptive Structured Matrices for Efficient Deep Neural Network Inference.
CoRR, 2024

Diffusion-Aided Joint Source Channel Coding For High Realism Wireless Image Transmission.
CoRR, 2024

Quantum Circuit Simulation with Fast Tensor Decision Diagram.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

ParaBase: A Configurable Parallel Baseband Processor for Ultra-High-Speed Inter-Satellite Optical Communications.
Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

Differentiable Learning of Generalized Structured Matrices for Efficient Deep Neural Networks.
Proceedings of the Twelfth International Conference on Learning Representations, 2024

2023
Learning-Based Near-Orthogonal Superposition Code for MIMO Short Message Transmission.
IEEE Trans. Commun., September, 2023

Instantaneous Feedback-Based Opportunistic Symbol Length Adaptation for Reliable Communication.
IEEE Trans. Commun., July, 2023

Hyper-Dimensional Modulation for Robust Short Packets in Massive Machine-Type Communications.
IEEE Trans. Commun., March, 2023

Differentiable Learning of Generalized Structured Matrices for Efficient Deep Neural Networks.
CoRR, 2023

Real-Time Classification of Radiation Pulses With Piled-Up Recovery Using an FPGA-Based Artificial Neural Network.
IEEE Access, 2023

A Reconfigurable Analog FIR Filter Achieving -70dB Rejection with Sharp Transition for Narrowband Receivers.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A Wireless Neural Stimulator IC for Cortical Visual Prosthesis.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Global Localization of Energy-Constrained Miniature RF Emitters using Low Earth Orbit Satellites.
Proceedings of the 21st ACM Conference on Embedded Networked Sensor Systems, 2023

A $1.5\mu\mathrm{W}$ End-to-End Keyword Spotting SoC with Content-Adaptive Frame Sub-Sampling and Fast-Settling Analog Frontend.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

An 8.09TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

TaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

Efficient Computation Sharing for Multi-Task Visual Scene Understanding.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

Deep Learning-Based Joint Channel Coding and Frequency Modulation for Low Power Connectivity.
Proceedings of the IEEE International Conference on Communications, 2023

Search for Efficient Deep Visual-Inertial Odometry Through Neural Architecture Search.
Proceedings of the IEEE International Conference on Acoustics, 2023

MMVC: Learned Multi-Mode Video Compression with Block-based Prediction Mode Selection and Density-Adaptive Entropy Coding.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

Deep Joint Source-Channel Coding with Iterative Source Error Correction.
Proceedings of the International Conference on Artificial Intelligence and Statistics, 2023

2022
OFDM-Guided Deep Joint Source Channel Coding for Wireless Multipath Fading Channels.
IEEE Trans. Cogn. Commun. Netw., 2022

A Power-Efficient Brain-Machine Interface System With a Sub-mw Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates.
IEEE Trans. Biomed. Circuits Syst., 2022

Tracking the Migration of the Monarch Butterflies with the World's Smallest Computer.
GetMobile Mob. Comput. Commun., 2022

A Light-Tolerant Wireless Neural Recording IC for Motor Prediction With Near-Infrared-Based Power and Data Telemetry.
IEEE J. Solid State Circuits, 2022

Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory.
IEEE J. Solid State Circuits, 2022

Autocorrelation and Spectrum Analysis for Variable Symbol Length Communications with Feedback.
CoRR, 2022

Hardware Acceleration for Third-Generation FHE and PSI Based on It.
CoRR, 2022

Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 260×274 μm<sup>2</sup> 572 nW Neural Recording Micromote Using Near-Infrared Power Transfer and an RF Data Uplink.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Long-Range Narrowband RF Localization System with a Crystal-Less Frequency-Hopping Receiver.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A Unified Forward Error Correction Accelerator for Multi-Mode Turbo, LDPC, and Polar Decoding.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

Improving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022


Deep Learning Based Near-Orthogonal Superposition Code for Short Message Transmission.
Proceedings of the IEEE International Conference on Communications, 2022

Deep Joint Source-Channel Coding for Wireless Image Transmission with Adaptive Rate Control.
Proceedings of the IEEE International Conference on Acoustics, 2022

An End-to-End Deep Learning Framework For Multiple Audio Source Separation And Localization.
Proceedings of the IEEE International Conference on Acoustics, 2022

Efficient Deep Visual and Inertial Odometry with Adaptive Visual Modality Selection.
Proceedings of the Computer Vision - ECCV 2022, 2022

Squaring the circle: Executing Sparse Matrix Computations on FlexTPU - A TPU-Like Processor.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021
RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator.
IEEE J. Solid State Circuits, 2021

An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks.
IEEE J. Solid State Circuits, 2021

Deep Joint Source Channel Coding for WirelessImage Transmission with OFDM.
CoRR, 2021

An Artificial Neural Network System for Photon-Based Active Interrogation Applications.
IEEE Access, 2021

A Light Tolerant Neural Recording IC for Near-Infrared-Powered Free Floating Motes.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

HTNN: Deep Learning in Heterogeneous Transform Domains with Sparse-Orthogonal Weights.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

Deep Joint Source Channel Coding for Wireless Image Transmission with OFDM.
Proceedings of the ICC 2021, 2021

Deep Learning in Latent Space for Video Prediction and Compression.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021

2020
Interactive-Multiple-Model Algorithm Based on Minimax Particle Filtering.
IEEE Signal Process. Lett., 2020

A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator.
IEEE J. Solid State Circuits, 2020

Millimeter-Scale Node-to-Node Radio Using a Carrier Frequency-Interlocking IF Receiver for a Fully Integrated 4 $\times$ 4 $\times$ 4 mm<sup>3</sup> Wireless Sensor Node.
IEEE J. Solid State Circuits, 2020

An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

1.03pW/b Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent Edge Processors.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

iGYM: An Inclusive Augmented Reality Exergame for People of All Abilities.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

AA-ResNet: Energy Efficient All-Analog ResNet Accelerator.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

26.9 A 0.19×0.17mm<sup>2</sup> Wireless Neural Recording IC for Motor Prediction with Near-Infrared-Based Power and Data Telemetry.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Unified Signal Compression Using Generative Adversarial Networks.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

Non-Orthogonal Modulation for Short Packets in Massive Machine Type Communications.
Proceedings of the IEEE Global Communications Conference, 2020

Migrating Monarch Butterfly Localization Using Multi-Modal Sensor Fusion Neural Networks.
Proceedings of the 28th European Signal Processing Conference, 2020

Super-Resolution Time-of-Arrival Estimation using Neural Networks.
Proceedings of the 28th European Signal Processing Conference, 2020

Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
Low Complexity, Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low-Power Mobile Vision Applications.
IEEE Trans. Circuits Syst. Video Technol., 2019

An Acoustic Signal Processing Chip With 142-nW Voice Activity Detection Using Mixer-Based Sequential Frequency Scanning and Neural Network Classification.
IEEE J. Solid State Circuits, 2019

A 1920 $\times$ 1080 25-Frames/s 2.4-TOPS/W Low-Power 6-D Vision Processor for Unified Optical Flow and Stereo Depth With Semi-Global Matching.
IEEE J. Solid State Circuits, 2019

Analysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 $\times$ Frequency Edge Combiner.
IEEE J. Solid State Circuits, 2019

Enhanced Interference Rejection Bluetooth Low-Energy Back-Channel Receiver With LO Frequency Hopping.
IEEE J. Solid State Circuits, 2019

Migrating Monarch Butterfly Localization Using Multi-Sensor Fusion Neural Networks.
CoRR, 2019

Simultaneous Interference-Data Transmission for Secret Key Generation in Distributed IoT Sensor Networks.
CoRR, 2019

A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 606μW mm-Scale Bluetooth Low-Energy Transmitter Using Co-Designed 3.5×3.5mm<sup>2</sup> Loop Antenna and Transformer-Boost Power Oscillator.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

An 879GOPS 243mW 80fps VGA Fully Visual CNN-SLAM Processor for Wide-Range Autonomous Exploration.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 142nW Voice and Acoustic Activity Detection Chip for mm-Scale Sensor Nodes Using Time-Interleaved Mixer-Based Frequency Scanning.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

iLPS: Local Positioning System with Simultaneous Localization and Wireless Communication.
Proceedings of the 2019 IEEE Conference on Computer Communications, 2019

Collision-Tolerant Narrowband Communication Using Non-Orthogonal Modulation and Multiple Access.
Proceedings of the 2019 IEEE Global Communications Conference, 2019

IoT<sup>2</sup> - the Internet of Tiny Things: Realizing mm-Scale Sensors through 3D Die Stacking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

iGYM: An Interactive Floor Projection System for Inclusive Exergame Environments.
Proceedings of the Annual Symposium on Computer-Human Interaction in Play, 2019

iGYM: A Wheelchair-Accessible Interactive Floor Projection System for Co-located Physical Play.
Proceedings of the Extended Abstracts of the 2019 CHI Conference on Human Factors in Computing Systems, 2019

2018
A Fixed-Point Neural Network Architecture for Speech Applications on Resource Constrained Hardware.
J. Signal Process. Syst., 2018

A MURS Band Digital Quadrature Transmitter With Class-B I/Q Cell Sharing for Long Range IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Analysis of Circuit Noise and Non-Ideal Filtering Impact on Energy Detection Based Ultra-Low-Power Radios Performance.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles.
IEEE J. Solid State Circuits, 2018

Always-On 12-nW Acoustic Sensing and Object Recognition Microsystem for Unattended Ground Sensor Nodes.
IEEE J. Solid State Circuits, 2018

A1920 × 1080 25FPS, 2.4TOPS/W Unified Optical Flow and Depth 6D Vision Processor for Energy-Efficient, Low Power Autonomous Navigation.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Implementation and Evaluation of Bi-Directional WiFi Back-channel Communication.
Proceedings of the 29th IEEE Annual International Symposium on Personal, 2018

HDM: Hyper-Dimensional Modulation for Robust Low-Power Communications.
Proceedings of the 2018 IEEE International Conference on Communications, 2018

OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

A 470µW -92.5dBm OOK/FSK Receiver for IEEE 802.11 WiFi LP-WUR.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

A receiver/antenna co-design for a 1.5mJ per fix fully-integrated 10×10×6mm<sup>3</sup> GPS logger.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

RF-Echo: A Non-Line-of-Sight Indoor Localization System Using a Low-Power Active RF Reflector ASIC Tag.
Proceedings of the 23rd Annual International Conference on Mobile Computing and Networking, 2017

3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

21.6 A 12nW always-on acoustic sensing and object recognition microsystem using frequency-domain feature extraction and SVM classification.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

7.4 A 915MHz asymmetric radio using Q-enhanced amplifier for a fully integrated 3×3×3mm<sup>3</sup> wireless sensor node with 20m non-line-of-sight communication.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A Programmable Galois Field Processor for the Internet of Things.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

2016
A 10 mm<sup>3</sup> Inductive Coupling Radio for Syringe-Implantable Smart Sensor Nodes.
IEEE J. Solid State Circuits, 2016

Back-Channel Wireless Communication Embedded in WiFi-Compliant OFDM Packets.
IEEE J. Sel. Areas Commun., 2016

Energy-Autonomous Wireless Communication for Millimeter-Scale Internet-of-Things Sensor Nodes.
IEEE J. Sel. Areas Commun., 2016

A 380pW dual mode optical wake-up receiver with ambient noise cancellation.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low Power Vision Applications.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

A Dual-Stage, Ultra-Low-Power Acoustic Event Detection System.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

26.7 A 10mm3 syringe-implantable near-field radio system on glass substrate.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Low complexity optical flow using neighbor-guided semi-global matching.
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

A low power software-defined-radio baseband processor for the Internet of Things.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

Software-Defined, WiFi and BLE Compliant Back-Channel for Ultra-Low Power Wireless Communication.
Proceedings of the 2016 IEEE Global Communications Conference, 2016

2015
A fixed-point neural network for keyword detection on resource constrained hardware.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Human body and head characteristics as a communication medium for Body Area Network.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2013
Forwarding metamorphosis: fast programmable match-action processing in hardware for SDN.
Proceedings of the ACM SIGCOMM 2013 Conference, 2013

2012
Coding for jointly optimizing energy and peak current in deep sub-micron VLSI interconnects.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Power Optimized PA Clipping for MIMO-OFDM Systems.
IEEE Trans. Wirel. Commun., 2011

2010
Energy-Constrained Link Adaptation for MIMO OFDM Wireless Communication Systems.
IEEE Trans. Wirel. Commun., 2010

2009
A Theoretical Treatment of PA Power Optimization in Clipped MIMO-OFDM Systems.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

2008
A Practical, Hardware Friendly MMSE Detector for MIMO-OFDM-Based Systems.
EURASIP J. Adv. Signal Process., 2008

2007
An efficient FPGA based MIMO-MMSE detector.
Proceedings of the 15th European Signal Processing Conference, 2007

A real time 4×4 MIMO-OFDM SDR for wireless networking research.
Proceedings of the 15th European Signal Processing Conference, 2007

2006
A real time MIMO OFDM testbed for cognitive radio & networking research.
Proceedings of the First ACM Workshop on Wireless Network Testbeds, 2006


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