Huichu Liu

According to our database1, Huichu Liu authored at least 28 papers between 2013 and 2024.

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Bibliography

2024
11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area Footprint.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022
Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications.
IEEE Micro, 2022

Co-Optimization of SRAM Circuits with Sequential Access Patterns in a 7nm SoC Achieving 58% Memory Energy Reduction for AR Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Uniform Latency Model for DNN Accelerators with Diverse Architectures and Dataflows.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

System-Level Design and Integration of a Prototype AR/VR Hardware Featuring a Custom Low-Power DNN Accelerator Chip in 7nm Technology for Codec Avatars.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021
SE2: Going Remote: Challenges and Opportunities to Remote Learning, Work, and Collaboration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

F5: Enabling New System Architectures with 2.5D, 3D, and Chiplets.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019
Scalable energy-efficient magnetoelectric spin-orbit logic.
Nat., 2019

2018
Low-Power, Adaptive Neuromorphic Systems: Recent Progress and Future Directions.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Density Tradeoffs of Non-Volatile Memory as a Replacement for SRAM Based Last Level Cache.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

2017
Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems.
ACM Trans. Embed. Comput. Syst., 2017

2016
Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Enabling New Computation Paradigms with HyperFET - An Emerging Device.
IEEE Trans. Multi Scale Comput. Syst., 2016

2015
Analog Circuit Design Using Tunnel-FETs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures.
Proceedings of the 28th International Conference on VLSI Design, 2015

A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications.
Proceedings of the 28th International Conference on VLSI Design, 2015

2014
Tunnel FET technology: A reliability perspective.
Microelectron. Reliab., 2014

Tunnel FET RF Rectifier Design for Energy Harvesting Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

Low-power high-speed current mode logic using Tunnel-FETs.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

Rf-powered systems using steep-slope devices.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

A Low-Voltage Low-Power LC Oscillator Using the Diode-Connected SymFET.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisition.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Steep Slope Devices: Enabling New Architectural Paradigms.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications.
Proceedings of the International Symposium on Quality Electronic Design, 2013

Tunnel FET-based ultra-low power, high-sensitivity UHF RFID rectifier.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013


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