Hui Wang
Orcid: 0000-0002-4688-1451Affiliations:
- Stanford University, Department of Electrical Engineering, CA, USA
- University of California at San Diego, Department of Electrical and Computer Engineering, La Jolla, CA, USA (PhD 2018)
According to our database1,
Hui Wang
authored at least 19 papers
between 2011 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
A 0.83-pJ/b 20-Gb/s/Pin Single-Ended Transceiver With AC/DC-Coupled Pre-Emphasis FFE and Edge-Dependent Phase-Modulation DFE for Low-Power Memory Controllers.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024
Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a Current-Source Transistor and a Resistive-Load Transistor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
A 16MHz CMOS RC Frequency Reference with ±125ppm Inaccuracy from -40°C to 85°C Enabled by a Capacitively Modulated RC Time Constant (CMT) Generation and a Die-to-Die Error Removal (DDER) Technique.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2019
A 763 pW 230 pJ/Conversion Fully Integrated CMOS Temperature-to-Digital Converter With +0.81 °C/-0.75 °C Inaccuracy.
IEEE J. Solid State Circuits, 2019
2018
A Current-Mode Capacitively-Coupled Chopper Instrumentation Amplifier for Biopotential Recording With Resistive or Capacitive Electrodes.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
IEEE J. Solid State Circuits, 2018
2017
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
A 1.6%/V 124.2 pW 9.3 Hz relaxation oscillator featuring a 49.7 pW voltage and current reference generator.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
A 420 fW self-regulated 3T voltage reference generator achieving 0.47%/V line regulation from 0.4-to-1.2 V.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
A Reference-Free Capacitive-Discharging Oscillator Architecture Consuming 44.4 pW/75.6 nW at 2.8 Hz/6.4 kHz.
IEEE J. Solid State Circuits, 2016
A fully integrated 144 MHz wireless-power-receiver-on-chip with an adaptive buck-boost regulating rectifier and low-loss H-Tree signal distribution.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
A 14.5 pW, 31 ppm/°C resistor-less 5 pA current reference employing a self-regulated push-pull voltage reference generator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation.
Proceedings of the Symposium on VLSI Circuits, 2015
A 51 pW reference-free capacitive-discharging oscillator architecture operating at 2.8 Hz.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011