Hui Wang

According to our database, Hui Wang authored at least 37 papers between 1999 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Designing scrubbing strategy for memories suffering MCUs through the selection of optimal interleaving distance.

Wei Zhou, Hong Zhang, Hui Wang, Yu Wang

Int. J. Comput. Sci. Eng., 2019

2014

A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ.

Xueqing Li, Qi Wei, Zhen Xu, Jianan Liu, Hui Wang, Huazhong Yang

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A single channel, 6-bit 410-ms/s asynchronous SAR ADC based on 3bits/stage.

Xue Han, Nan Zhao, Qi Wei, Fei Qiao, Huazhong Yang, Hui Wang

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

2013

Design Methodology of the Heterogeneous Multi-core Processor With the Combination of Parallelized Multi-core Simulator and Common Register File-Based Instruction Set Extension Architecture.

Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang

J. Comput., 2013

HS3DPG: Hierarchical simulation for 3D P/G network.

Shuai Tao, Xiaoming Chen, Yu Wang, Yuchun Ma, Yiyu Shi, Hui Wang, Huazhong Yang

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

A low-power fast-settling bond-wire frequency synthesizer with a dynamic-bandwidth scheme.

Bo Zhao, Huazhong Yang, Hui Wang

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A Low-Power IF Circuit with 5 dB Minimum Input SNR for GFSK Low-IF Receivers.

Bo Zhao, Guangming Yu, Tao Chen, Pengpeng Chen, Huazhong Yang, Hui Wang

IEICE Trans. Electron., 2011

Low-Power Off-Chip Memory Design for Video Decoder Using Embedded Bus-Invert Coding.

Ni Zhou, Fei Qiao, Huazhong Yang, Hui Wang

Proceedings of the 10th International Symposium on Autonomous Decentralized Systems, 2011

2010

Evaluation of Tunable Data Compression in Energy-Aware Wireless Sensor Networks.

Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang

Sensors, 2010

Output remapping technique for critical paths soft-error rate reduction.

Qian Ding, Yu Wang, Hui Wang, Rong Luo, Huazhong Yang

IET Comput. Digit. Tech., 2010

Fast-locking all-digital phase-locked loop with digitally controlled oscillator tuning word estimating and presetting.

Guangming Yu, Yu Wang, Huazhong Yang, Hui Wang

IET Circuits Devices Syst., 2010

Lightweight Precision-Adaptive Time Synchronization in Wireless Sensor Networks.

Li Li, Yongpan Liu, Huazhong Yang, Hui Wang

IEICE Trans. Commun., 2010

A fault-tolerant structure for reliable multi-core systems based on hardware-software co-design.

Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009

Energy efficient architecture of sensor network node based on compression accelerator.

Jue Wang, Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2008

Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits.

Yu Wang, Ku He, Rong Luo, Hui Wang, Huazhong Yang

IEEE Trans. Very Large Scale Integr. Syst., 2008

Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection.

Fei Qiao, Huazhong Yang, Gang Huang, Hui Wang

Sci. China Ser. F Inf. Sci., 2008

Output Remapping Technique for Soft-Error Rate Reduction in Critical Paths.

Qian Ding, Yu Wang, Hui Wang, Rong Luo, Huazhong Yang

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007

Modified Conditional-Precharge Sense-amplifier-Based Flip-Flop with Improved Speed.

Fei Qiao, Huazhong Yang, Dingli Wei, Hui Wang

J. Circuits Syst. Comput., 2007

Phase noise analysis of oscillators with Sylvester representation for periodic time-varying modulus matrix by regular perturbations.

JianXing Fan, Huazhong Yang, Hui Wang, Xiaolang Yan, Chaohuan Hou

Sci. China Ser. F Inf. Sci., 2007

Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems.

Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wang, Li Shang

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

A Hybrid Genetic Algorithm with Critical Primary Inputs Sharing and Minor Primary Inputs Bits Climbing for Circuit Maximum Power Estimation.

Zhixin Tian, Yongpan Liu, Huazhong Yang, Hui Wang

Proceedings of the Third International Conference on Natural Computation, 2007

2006

Signal-Path-Level Dual-V_T Assignment for Leakage Power Reduction.

Yu Wang, Huazhong Yang, Hui Wang

J. Circuits Syst. Comput., 2006

A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator.

Jun Chen, Rong Luo, Huazhong Yang, Hui Wang

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Modeling the Impact of Process Variation on Critical Charge Distribution.

Qian Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie

Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

IR-drop Reduction Through Combinational Circuit Partitioning.

Hai Lin, Yu Wang, Rong Luo, Huazhong Yang, Hui Wang

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Simultaneous Fine-grain Sleep Transistor Placement and Sizing for Leakage Optimization.

Yu Wang, Hai Lin, Huazhong Yang, Rong Luo, Hui Wang

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits.

Yu Wang, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang

Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Sigma-delta based clock recovery using on-chip PLL in FPGA.

Ning Ge, Yuyu Liu, Huazhong Yang, Hui Wang

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate.

Yu Wang, Hui Wang, Huazhong Yang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A New Thermal-Conscious System-Level Methodology for Energy-Efficient Processor Voltage Selection.

Yongpan Liu, Yu Wang, Feng Zhang, Rong Luo, Hui Wang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices.

Saihua Lin, Rong Luo, Huazhong Yang, Hui Wang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

Application of DAPSK in HF communications.

Shuzheng Xu, Huazhong Yang, Hui Wang

IEEE Commun. Lett., 2005

Improved Multiuser Detection for Fast FH/MFSK Systems.

Hui Zhang, Huazhong Yang, Shuzheng Xu, Hui Wang

Proceedings of the 2005 International Conference on Wireless Networks, 2005

A Hierarchical Approach for Incremental Floorplan Based on Genetic Algorithms.

Yongpan Liu, Huazhong Yang, Rong Luo, Hui Wang

Proceedings of the Advances in Natural Computation, First International Conference, 2005

2002

An approach to predicting dynamic power dissipation of coupled interconnect network in dynamic CMOS logic circuits.

Gang Huang, Huazhong Yang, Rong Luo, Hui Wang

Sci. China Ser. F Inf. Sci., 2002

2001

Noise estimation for deep sub-micron integrated circuits.

Bin Chen, Huazhong Yang, Hui Wang

Sci. China Ser. F Inf. Sci., 2001

1999

An SA-Based Nonlinear Function Synthesizer for Linear Analog Integrated Circuits.

Huazhong Yang, Rong Luo, Hui Wang, Runsheng Liu

Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999