Hui-Hsiang Tung

According to our database, Hui-Hsiang Tung authored at least 5 papers between 2007 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Standard Cell Like Via-Configurable Logic Blocks for Structured ASIC in an Industrial Design Flow.

Hui-Hsiang Tung, Rung-Bin Lin, Mei-Chen Li, Tsung-Han Heish

IEEE Trans. Very Large Scale Integr. Syst., 2012

2010

Via configurable three-input lookup-tables for structured ASICs.

Yu-Chen Chen, Hou-Yu Pang, Kuen-Wey Lin, Rung-Bin Lin, Hui-Hsiang Tung, Shih-Chieh Su

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Power gating design for standard-cell-like structured ASICs.

Sin-Yu Chen, Rung-Bin Lin, Hui-Hsiang Tung, Kuen-Wey Lin

Proceedings of the Design, Automation and Test in Europe, 2010

2008

Standard Cell Like Via-Configurable Logic Block for Structured ASICs.

Mei-Chen Li, Hui-Hsiang Tung, Chien-Chung Lai, Rung-Bin Lin

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2007

Double-via-driven standard cell library design.

Tsai-Ying Lin, Tsung-Han Lin, Hui-Hsiang Tung, Rung-Bin Lin

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007