Hui Chen

Orcid: 0000-0001-5462-8029

Affiliations:
  • Nanjing University, School of Electronic Science and Engineering, Nanjing, China


According to our database1, Hui Chen authored at least 18 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
High-Precision Method and Architecture for Base-2 Softmax Function in DNN Training.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

Low-Cost High-Precision Architecture for Arbitrary Floating-Point Nth Root Computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A 67.5μJ/Prediction Accelerator for Spiking Neural Networks in Image Segmentation.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Base-2 Softmax Function: Suitability for Training and Efficient Hardware Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Low-Latency Low-Complexity Method and Architecture for Computing Arbitrary Nth Root of Complex Numbers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Huicore: A Generalized Hardware Accelerator for Complicated Functions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Low-Complexity High-Performance Method for Calculating Arbitrary Logarithm Function.
Proceedings of the 19th International SoC Design Conference, 2022

<sup>2</sup>b-sigmoid and <sup>2</sup>b-tanh: Low Hardware Complexity Activation Functions for LSTM.
Proceedings of the 19th International SoC Design Conference, 2022

2021
Low-Complexity High-Precision Method and Architecture for Computing the Logarithm of Complex Numbers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Symmetric-Mapping LUT-Based Method and Architecture for Computing X<sup>Y</sup>-Like Functions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Optimizing Vertical Link Placement and Congestion Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

<sup>2</sup>β-softmax: A Hardware-Friendly Activation Function with Low Complexity and High Performance.
Proceedings of the 18th International SoC Design Conference, 2021

Low-Latency Architecture for Implementing Floating-Point Multiplier and Divider Based on Symmetric-Mapping LUT.
Proceedings of the 18th International SoC Design Conference, 2021

A Low-Complexity Architecture for Implementing Square to Tenth Root of Complex Numbers.
Proceedings of the 18th International SoC Design Conference, 2021

A General Methodology and Architecture for Arbitrary Complex Number Nth Root Computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Game Strategy of Snatching Ball Based on Area Division.
Proceedings of the ICAIIS 2021: 2021 2nd International Conference on Artificial Intelligence and Information Systems, Chongqing, China, May 28, 2021

2020
Hyperbolic CORDIC-Based Architecture for Computing Logarithm and Its Implementation.
IEEE Trans. Circuits Syst., 2020

A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020


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