Hugues Cassé
Orcid: 0000-0002-9298-5235
According to our database1,
Hugues Cassé
authored at least 43 papers
between 1999 and 2023.
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Bibliography
2023
Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
IEEE Trans. Computers, 2023
2022
ACM Trans. Embed. Comput. Syst., 2022
2021
Proceedings of the 42nd IEEE Real-Time Systems Symposium, 2021
Proceedings of the RTNS'2021: 29th International Conference on Real-Time Networks and Systems, 2021
Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks.
Proceedings of the Architecture of Computing Systems - 34th International Conference, 2021
2020
Proceedings of the 21st ACM SIGPLAN/SIGBED International Conference on Languages, 2020
2019
Proceedings of the 19th International Workshop on Worst-Case Execution Time Analysis, 2019
2018
Reducing Timing Interferences in Real-Time Applications Running on Multicore Architectures.
Proceedings of the 18th International Workshop on Worst-Case Execution Time Analysis, 2018
2017
Proceedings of the 17th International Workshop on Worst-Case Execution Time Analysis, 2017
Proceedings of the 17th IEEE International Working Conference on Source Code Analysis and Manipulation, 2017
2016
ACM Trans. Embed. Comput. Syst., 2016
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016
2015
Proceedings of the 15th International Workshop on Worst-Case Execution Time Analysis, 2015
Proceedings of the 15th International Workshop on Worst-Case Execution Time Analysis, 2015
Case study: Performance and WCET analysis for parallelised avionic applications with ODC<sup>2</sup>.
Proceedings of the 13th IEEE International Conference on Industrial Informatics, 2015
2014
Proceedings of the Architecture of Computing Systems - ARCS 2014, 2014
2013
Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013
parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
2012
Proceedings of the Third Workshop on Tools for Automatic Program Analysis, 2012
Proceedings of the 20th International Conference on Real-Time and Network Systems, 2012
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012
2011
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor.
Comput. Syst. Sci. Eng., 2011
2010
IEEE Micro, 2010
CoRR, 2010
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010
Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2010
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor.
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010
Proceedings of the Leveraging Applications of Formal Methods, Verification, and Validation, 2010
Proceedings of the 1st Workshop on Critical Automotive Applications: Robustness & Safety, 2010
2009
Proceedings of the 9th Intl. Workshop on Worst-Case Execution Time Analysis, 2009
2008
WCET 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis.
Proceedings of the 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2008
Proceedings of the 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2008
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008
Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), 2008
Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation.
Proceedings of the Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, 2008
Proceedings of the 20th Euromicro Conference on Real-Time Systems, 2008
2007
Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis.
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007
2006
Proceedings of the 6th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2006
2002
Tech. Sci. Informatiques, 2002
1999
SIGARCH Comput. Archit. News, 1999