Huang-Chung Cheng

According to our database, Huang-Chung Cheng authored at least 2 papers between 2010 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

3DIC with Stacked FinFET, Inter-Level Metal, and Field-Size (25×33mm²) Single-Crystalline Si on SiO2 by Elevated-Epi.

Bo-Jheng Shih, Yu-Ming Pan, Hao-Tung Chung, Chieh-Ling Lee, I-Chun Hsieh, Nein-Chih Lin, Chih-Chao Yang, Po-Tsang Huang, Hung-Ming Chen, Chiao-Yen Wang, Huan-Yu Chiu, Huang-Chung Cheng, Chang-Hong Shen, Wen-Fa Wu, Tuo-Hung Hou, Kuan-Neng Chen, Chenming Hu

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2010

Field enhancement of omega-shaped-gated poly-Si TFT SONOS memory fabricated by a simple sidewall spacer formation.

Chun-Yu Wu, Ta-Chuan Liao, Ming-H Yu, Sheng-Kai Chen, Chung-Min Tsai, Huang-Chung Cheng

Microelectron. Reliab., 2010