Hsun-Cheng Lee

According to our database, Hsun-Cheng Lee authored at least 7 papers between 2000 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

Digital Calibration for 8-bit Delay Line ADC Using Harmonic Distortion Correction.

Hsun-Cheng Lee, Jacob A. Abraham

J. Electron. Test., 2015

2014

Harmonic distortion correction for 8-bit delay line ADC using gray code.

Hsun-Cheng Lee, Jacob A. Abraham

Proceedings of the 15th Latin American Test Workshop, 2014

A novel low power 11-bit hybrid ADC using flash and delay line architectures.

Hsun-Cheng Lee, Jacob A. Abraham

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2012

An innovative scheme for the UNI interworking of ASON and GMPLS.

Chin-Cheng Hu, Chin-Wei Lin, Hsun-Cheng Lee, Ching-Sheu Wang

Proceedings of the 21st Annual Wireless and Optical Communications Conference, 2012

2007

MB^ast-Tree: A Multilevel Floorplanner for Large-Scale Building-Module Design.

Hsun-Cheng Lee, Yao-Wen Chang, Hannah Honghua Yang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2003

Multilevel floorplanning/placement for large-scale modules using B*-trees.

Hsun-Cheng Lee, Yao-Wen Chang, Jer-Ming Hsu, Hannah Honghua Yang

Proceedings of the 40th Design Automation Conference, 2003

2000

Feasible two-way circuit partitioning with complex resource constraints.

Hsun-Cheng Lee, Ting-Chi Wang

Proceedings of ASP-DAC 2000, 2000