Hsinyu Tsai

According to our database, Hsinyu Tsai authored at least 21 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Pipeline Gradient-based Model Training on Analog In-memory Accelerators.

Zhaoxian Wu, Quan Xiao, Tayfun Gokmen, Hsinyu Tsai, Kaoutar El Maghraoui, Tianyi Chen

CoRR, 2024

2023

A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh.

Shubham Jain, Hsinyu Tsai, Ching-Tzu Chen, Ramachandran Muralidhar, Irem Boybat, Martin M. Frank, Stanislaw Wozniak, Milos Stanisavljevic, Praneet Adusumilli, Pritish Narayanan, Kohji Hosokawa, Masatoshi Ishii, Arvind Kumar, Vijay Narayanan, Geoffrey W. Burr

IEEE Trans. Very Large Scale Integr. Syst., 2023

An analog-AI chip for energy-efficient speech recognition and transcription.

Stefano Ambrogio, Pritish Narayanan, Atsuya Okazaki, Andrea Fasoli, Charles Mackin, Kohji Hosokawa, Akiyo Nomura, Takeo Yasuda, An Chen, Alexander M. Friz, Masatoshi Ishii, Jose Luquin, Yasuteru Kohda, Nicole Saulnier, Kevin Brew, Samuel Choi, Injo Ok, Timothy Philip, Victor Chan, Mary Claire Silvestre, Ishtiaq Ahsan, Vijay Narayanan, Hsinyu Tsai, Geoffrey W. Burr

Nat., 2023

Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference.

Manuel Le Gallo, Corey Lammie, Julian Büchel, Fabio Carta, Omobayode Fagbohungbe, Charles Mackin, Hsinyu Tsai, Vijay Narayanan, Abu Sebastian, Kaoutar El Maghraoui, Malte J. Rasch

CoRR, 2023

Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators.

Malte J. Rasch, Charles Mackin, Manuel Le Gallo, An Chen, Andrea Fasoli, Frédéric Odermatt, Ning Li, S. R. Nandakumar, Pritish Narayanan, Hsinyu Tsai, Geoffrey W. Burr, Abu Sebastian, Vijay Narayanan

CoRR, 2023

Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).

Geoffrey W. Burr, Pritish Narayanan, Stefano Ambrogio, Atsuya Okazaki, Hsinyu Tsai, Kohji Hosokawa, Charles Mackin, Akiyo Nomura, Takeo Yasuda, J. Demarest, Kevin Brew, Victor Chan, Samuel Choi, T. Gordon, T. M. Levin, Alexander M. Friz, Masatoshi Ishii, Yasuteru Kohda, An Chen, Andrea Fasoli, Jose Luquin, Nicole Saulnier, S. Teehan, Ishtiaq Ahsan, Vijay Narayanan

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).

Hsinyu Tsai, Pritish Narayanan, Shubham Jain, Stefano Ambrogio, Kohji Hosokawa, Masatoshi Ishii, Charles Mackin, Ching-Tzu Chen, Atsuya Okazaki, Akiyo Nomura, Irem Boybat, Ramachandran Muralidhar, Martin M. Frank, Takeo Yasuda, Alexander M. Friz, Yasuteru Kohda, An Chen, Andrea Fasoli, Malte J. Rasch, Stanislaw Wozniak, Jose Luquin, Vijay Narayanan, Geoffrey W. Burr

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Impact of Phase-Change Memory Drift on Energy Efficiency and Accuracy of Analog Compute-in-Memory Deep Learning Inference (Invited).

Martin M. Frank, Ning Li, Malte J. Rasch, Shubham Jain, Ching-Tzu Chen, Ramachandran Muralidhar, Jin-Ping Han, Vijay Narayanan, Timothy Philip, Kevin Brew, Andrew Simon, Iqbal Saraf, Nicole Saulnier, Irem Boybat, Stanislaw Wozniak, Abu Sebastian, Pritish Narayanan, Charles Mackin, An Chen, Hsinyu Tsai, Geoffrey W. Burr

Proceedings of the IEEE International Reliability Physics Symposium, 2023

AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing.

Hadjer Benmeziane, Corey Lammie, Irem Boybat, Malte J. Rasch, Manuel Le Gallo, Hsinyu Tsai, Ramachandran Muralidhar, Smaïl Niar, Hamza Ouarnoughi, Vijay Narayanan, Abu Sebastian, Kaoutar El Maghraoui

Proceedings of the IEEE International Conference on Edge Computing and Communications, 2023

2022

Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.

Atsuya Okazaki, Pritish Narayanan, Stefano Ambrogio, Kohji Hosokawa, Hsinyu Tsai, Akiyo Nomura, Takeo Yasuda, Charles Mackin, Alexander M. Friz, Masatoshi Ishii, Yasuteru Kohda, Katie Spoon, An Chen, Andrea Fasoli, Malte J. Rasch, Geoffrey W. Burr

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices.

Katie Spoon, Hsinyu Tsai, An Chen, Malte J. Rasch, Stefano Ambrogio, Charles Mackin, Andrea Fasoli, Alexander M. Friz, Pritish Narayanan, Milos Stanisavljevic, Geoffrey W. Burr

Frontiers Comput. Neurosci., 2021

Circuit Techniques for Efficient Acceleration of Deep Neural Network Inference with Analog-AI (Invited).

Kohji Hosokawa, Pritish Narayanan, Stefano Ambrogio, Hsinyu Tsai, Charles Mackin, Andrea Fasoli, Alexander M. Friz, An Chen, Jose Luquin, Katherine Spoon, Geoffrey W. Burr, Scott C. Lewis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation.

Robert L. Bruce, Syed Ghazi Sarwat, Irem Boybat, Cheng-Wei Cheng, Wanki Kim, S. R. Nandakumar, Charles Mackin, Timothy Philip, Zuoguang Liu, Kevin Brew, Nanbo Gong, Injo Ok, Praneet Adusumilli, Katie Spoon, Stefano Ambrogio, Benedikt Kersting, Thomas Bohnstingl, Manuel Le Gallo, Andrew Simon, Ning Li, Iqbal Saraf, Jin-Ping Han, Lynne M. Gignac, John M. Papalia, Tenko Yamashita, Nicole Saulnier, Geoffrey W. Burr, Hsinyu Tsai, Abu Sebastian, Vijay Narayanan, Matthew BrightSky

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020

Optimization of Analog Accelerators for Deep Neural Networks Inference.

Andrea Fasoli, Stefano Ambrogio, Pritish Narayanan, Hsinyu Tsai, Charles Mackin, Katherine Spoon, Alexander M. Friz, An Chen, Geoffrey W. Burr

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Neuromorphic Computing with Phase Change, Device Reliability, and Variability Challenges.

Charles Mackin, Pritish Narayanan, Stefano Ambrogio, Hsinyu Tsai, Katie Spoon, Andrea Fasoli, An Chen, Alexander M. Friz, Robert M. Shelby, Geoffrey W. Burr

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Accelerating Deep Neural Networks with Analog Memory Devices.

Stefano Ambrogio, Pritish Narayanan, Hsinyu Tsai, Charles Mackin, Katherine Spoon, An Chen, Andrea Fasoli, Alexander M. Friz, Geoffrey W. Burr

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019

AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed.

Hung-Yang Chang, Pritish Narayanan, Scott C. Lewis, Nathan C. P. Farinha, Kohji Hosokawa, Charles Mackin, Hsinyu Tsai, Stefano Ambrogio, An Chen, Geoffrey W. Burr

IBM J. Res. Dev., 2019

Analog-to-Digital Conversion With Reconfigurable Function Mapping for Neural Networks Activation Function Acceleration.

Massimo Giordano, Giorgio Cristiano, Koji Ishibashi, Stefano Ambrogio, Hsinyu Tsai, Geoffrey W. Burr, Pritish Narayanan

IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

2018

Equivalent-accuracy accelerated neural-network training using analogue memory.

Stefano Ambrogio, Pritish Narayanan, Hsinyu Tsai, Robert M. Shelby, Irem Boybat, Carmelo di Nolfo, Severin Sidler, Massimo Giordano, Martina Bodini, Nathan C. P. Farinha, Benjamin Killeen, Christina Cheng, Yassine Jaoudi, Geoffrey W. Burr

Nat., 2018

2017

Neuromorphic devices and architectures for next-generation cognitive computing.

Geoffrey W. Burr, Pritish Narayanan, Robert M. Shelby, Stefano Ambrogio, Hsinyu Tsai, Scott L. Lewis, Kohji Hosokawa

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique.

Irem Boybat, Carmelo di Nolfo, Stefano Ambrogio, Martina Bodini, Nathan C. P. Farinha, Robert M. Shelby, Pritish Narayanan, Severin Sidler, Hsinyu Tsai, Yusuf Leblebici, Geoffrey W. Burr

Proceedings of the IEEE International Conference on Rebooting Computing, 2017