Hsing Min Chen
Orcid: 0000-0003-2894-6503
According to our database1,
Hsing Min Chen
authored at least 8 papers
between 2013 and 2019.
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Bibliography
2019
Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems.
IEEE Trans. Computers, 2019
2016
Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems.
IEEE Trans. Computers, 2016
RATT-ECC: Rate Adaptive Two-Tiered Error Correction Codes for Reliable 3D Die-Stacked Memory.
ACM Trans. Archit. Code Optim., 2016
Proceedings of the Second International Symposium on Memory Systems, 2016
2015
E-ECC: Low Power Erasure and Error Correction Schemes for Increasing Reliability of Commodity DRAM Systems.
Proceedings of the 2015 International Symposium on Memory Systems, 2015
2014
A Low Cost Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell Pram.
J. Signal Process. Syst., 2014
Improving the Reliability of MLC NAND Flash Memories Through Adaptive Data Refresh and Error Control Coding.
J. Signal Process. Syst., 2014
2013
Proceedings of the International Conference for High Performance Computing, 2013