Hsin-Yu Luo
According to our database1,
Hsin-Yu Luo
authored at least 11 papers
between 2010 and 2015.
Collaborative distances:
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Timeline
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Bibliography
2015
120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs.
Proceedings of the ESSCIRC Conference 2015, 2015
Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors.
Proceedings of the ESSCIRC Conference 2015, 2015
2014
Pseudo-Ramp Current Balance (PRCB) Technique With Offset Cancellation Control (OCC) in Dual-Phase DC-DC Buck Converter.
IEEE Trans. Very Large Scale Integr. Syst., 2014
A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A pseudo fixed switching frequency 2kHz/A in optimum on-time control buck converter with predicting correction technique for EMI solution.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A Class-D amplifier powered by embedded single-inductor bipolar-output power module with low common noise and dynamic voltage boosting technique.
Proceedings of the ESSCIRC 2014, 2014
Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology.
Proceedings of the ESSCIRC 2014, 2014
2013
Switching-based charger with continuously built-in resistor detector (CBIRD) and analog multiplication-division unit (AMDU) for fast charging in Li-Ion battery.
Proceedings of the ESSCIRC 2013, 2013
Embedded fully self-biased switched-capacitor for energy and area-efficient cholesteric LCD drivers.
Proceedings of the ESSCIRC 2013, 2013
2010
Automatic circuit adjustment technique for process sensitivity reduction and yield improvement.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010