Hsin-I Wu
Orcid: 0000-0001-5309-1733
According to our database1,
Hsin-I Wu
authored at least 21 papers
between 2012 and 2024.
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On csauthors.net:
Bibliography
2024
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2022
An Adaptive High-Performance Quantization Approach for Resource-Constrained CNN Inference.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
CoRR, 2021
CoRR, 2021
2020
A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
CoRR, 2020
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020
Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2020
Proceedings of the IEEE Global Conference on Artificial Intelligence and Internet of Things, 2020
A Pipeline-Based Scheduler for Optimizing Latency of Convolution Neural Network Inference over Heterogeneous Multicore Systems.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2018
A highly efficient full-system virtual prototype based on virtualization-assisted approach.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Proceedings of the 2017 IEEE Conference on Computer Communications, 2017
2016
An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices.
Proceedings of the 2016 IEEE International Conference on Healthcare Informatics, 2016
Poster Paper: An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices.
Proceedings of the 2016 IEEE International Conference on Healthcare Informatics, 2016
An accurate and flexible early memory system power evaluation approach using a microcomponent method.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016
2015
Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set Simulations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 13th Annual International Conference on Mobile Systems, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2013
A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012