Hsin-Cheng Lin
Orcid: 0000-0002-2110-4867
According to our database1,
Hsin-Cheng Lin
authored at least 7 papers
between 2005 and 2024.
Collaborative distances:
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Bibliography
2024
IEEE Access, 2024
2023
Extremely High-κ Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record Ion per Footprint of 9200μA/μm and Record Ion per Stack of 360μA at VOV=VDS=0.5V.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
Nearly Ideal Subthreshold Swing and Delay Reduction of Stacked Nanosheets Using Ultrathin Bodies.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2013
An Ultrasynchronization Checking Method With Trace-Driven Simulation for Fast and Accurate MPSoC Virtual Platform Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
2012
KSII Trans. Internet Inf. Syst., 2012
2011
Speeding Up MPSoC virtual platform simulation by Ultra Synchronization Checking Method.
Proceedings of the Design, Automation and Test in Europe, 2011
2005