Hsiao-Yin Tseng

According to our database, Hsiao-Yin Tseng authored at least 3 papers in 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Clock-Less DFT and BIST for Dual-Rail Asynchronous Circuits.

Tsai-Chieh Chen, Chia-Cheng Pai, Yi-Zhan Hsieh, Hsiao-Yin Tseng, Chien-Mo James Li, Tsung-Te Liu, I-Wei Chiu

J. Electron. Test., 2021

Fault Modeling and Testing of Spiking Neural Network Chips.

Yi-Zhan Hsieh, Hsiao-Yin Tseng, I-Wei Chiu, James Chien-Mo Li

Proceedings of the IEEE International Test Conference in Asia, 2021

Machine Learning-Based Test Pattern Generation for Neuromorphic Chips.

Hsiao-Yin Tseng, I-Wei Chiu, Mu-Ting Wu, James Chien-Mo Li

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021