Hsiang-Lam Lung

According to our database¹, Hsiang-Lam Lung authored at least 2 papers between 2016 and 2017.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Article

PhD thesis

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Bibliography

2017

A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2017

2016

7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Hsiang-Lam Lung

Timeline

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Links

On csauthors.net:

Bibliography

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