Hsiang-Chih Hsiao

According to our database1, Hsiang-Chih Hsiao authored at least 1 paper in 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2019
Architecture-aware Memory Access Scheduling for High-throughput Cascaded Classifiers.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019


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