Hsiang-Chieh Jhan

According to our database, Hsiang-Chieh Jhan authored at least 2 papers between 2016 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

An Efficient Two-Phase ILP-Based Algorithm for Precise CMOS RFIC Layout Generation.

Tsun-Ming Tseng, Bing Li, Ching-Feng Yeh, Hsiang-Chieh Jhan, Zuo-Min Tsai, Mark Po-Hung Lin, Ulf Schlichtmann

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016

Novel CMOS RFIC layout generation with concurrent device placement and fixed-length microstrip routing.

Tsun-Ming Tseng, Bing Li, Ching-Feng Yeh, Hsiang-Chieh Jhan, Zuo-Min Tsai, Mark Po-Hung Lin, Ulf Schlichtmann

Proceedings of the 53rd Annual Design Automation Conference, 2016