Hsi-En Liu

According to our database1, Hsi-En Liu authored at least 2 papers between 2014 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Design and modeling of PLL-based clock and data recovery circuits with periodically embedded clock encoding for intra-panel interfaces.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2014
A low-power Spread Spectrum Clock Generator with an embeddable half-integer division ratio interpolator.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014


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