Hritom Das
Orcid: 0000-0003-2548-8754
According to our database1,
Hritom Das
authored at least 28 papers
between 2019 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Neuromorph. Comput. Eng., 2024
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Evaluation of Neuron Parameters on the Performance of Spiking Neural Networks and Neuromorphic Hardware.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Hardware-Application Co-Design to Evaluate the Performance of an STDP-based Reservoir Computer.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
A Memristive Reconfigurable Neuromorphic Array for Neuro-Inspired Dynamic Architectures.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
HfO2-Based Synaptic Spiking Neural Network Evaluation to Optimize Design and Testing Cost.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
Enhanced Read Resolution in Reconfigurable Memristive Synapses for Spiking Neural Networks.
CoRR, 2023
Energy Efficient and High-Performance Synaptic Operating Point Evaluation for SNN Applications.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
RFAM: RESET-Failure-Aware-Model for HfO2-based Memristor to Enhance the Reliability of Neuromorphic Design.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
A Mixed-Signal Short-Term Plasticity Implementation for a Current-Controlled Memristive Synapse.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023
2022
Content-Adaptable ROI-Aware Video Storage for Power-Quality Scalable Mobile Streaming.
IEEE Access, 2022
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Benchmark Comparisons of Spike-based Reconfigurable Neuroprocessor Architectures for Control Applications.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
Application-Aware Quality-Energy Optimization: Mathematical Models Enabled Simultaneous Quality and Energy-Sensitive Optimal Memory Design.
IEEE Trans. Sustain. Comput., 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
IEEE Trans. Circuits Syst. Video Technol., 2020
2019
Embedded sensory data memory optimization for IoT edge inference with privacy, accuracy, and energy efficiency.
Proceedings of the 4th ACM/IEEE Symposium on Edge Computing, 2019