Howard Chen

Affiliations:
  • Thomas J. Watson Research Center, Yorktown Heights, NY, USA
  • University of California, Berkeley, CA, USA (PhD 1987)


According to our database1, Howard Chen authored at least 15 papers between 1986 and 2012.

Collaborative distances:

Timeline

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Bibliography

2012
Design and Implementation of Block-Based Partitioning for Parallel Flip-Chip Power-Grid Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

2011
Runtime Resonance Noise Reduction with Current Prediction Enabled Frequency Actuator.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2010
The Effect of Dynamic Power Management on Mid-Frequency and Low-Frequency Power Supply Noise.
J. Low Power Electron., 2010

2009
Statistical Power Analysis for High-Performance Processors.
J. Low Power Electron., 2009

Power Management and Its Impact on Power Supply Noise.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

Stochastic current prediction enabled frequency actuator for runtime resonance noise reduction.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Statistical Modeling and Analysis of Static Leakage and Dynamic Switching Power.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

2005
Circuit Design Techniques for On-Chip Power Supply Noise Monitoring System.
Proceedings of the Integrated Circuit and System Design, 2005

2004
Modeling Temporal and Spatial Power Supply Voltage Variation for Timing Analysis.
Proceedings of the Integrated Circuit and System Design, 2004

2003
On-Chip Decoupling Capacitor Optimization for Noise and Leakage Reduction.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

2002
Integrated electro-thermomechanical analysis of nonuniformly chip-powered microelectronic system.
Microelectron. Reliab., 2002

2000
Techniques for obtaining high performance in Java programs.
ACM Comput. Surv., 2000

1997
Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design.
Proceedings of the 34st Conference on Design Automation, 1997

1990
Pseudo pin assignment for single-layer over-the-cell routing.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

1986
Glitter: A Gridless Variable-Width Channel Router.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986


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