Hossein Sarbishaei

According to our database, Hossein Sarbishaei authored at least 6 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

ESD Avalanche Diodes Degradation in EOS Regime.

Hossein Sarbishaei, Vladislav A. Vashchenko

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2009

ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology.

Hossein Sarbishaei, Manoj Sachdev

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2007

Optimizing Circuit Performance and ESD Protection for High-Speed Differential I/Os.

Hossein Sarbishaei, Oleg Semenov, Manoj Sachdev

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Novel gate and substrate triggering techniques for deep sub-micron ESD protection devices.

Oleg Semenov, Hossein Sarbishaei, Valery Axelrad, Manoj Sachdev

Microelectron. J., 2006

2005

Analysis and Design of LVTSCR-based EOS/ESD Protection Circuits for Burn-in Environment.

Oleg Semenov, Hossein Sarbishaei, Manoj Sachdev

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

2004

The Impact of CMOS technology scaling on MOSFETs second breakdown: Evaluation of ESD robustness.

Oleg Semenov, Hossein Sarbishaei, Valery Axelrad, Manoj Sachdev

Microelectron. Reliab., 2004