Hongyang Hu
Orcid: 0000-0003-2291-9598
According to our database1,
Hongyang Hu
authored at least 9 papers
between 2013 and 2024.
Collaborative distances:
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Bibliography
2024
Write-Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024
34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
A 2T P-Channel Logic Flash Cell for Reconfigurable Interconnection in Chiplet-Based Computing-In-Memory Accelerators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
A 40-nm SONOS Digital CIM Using Simplified LUT Multiplier and Continuous Sample-Hold Sense Amplifier for AI Edge Inference.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference.
IEEE J. Solid State Circuits, October, 2023
IEICE Electron. Express, 2023
2022
A 55nm 32Mb Digital Flash CIM Using Compressed LUT Multiplier and Low Power WL Voltage Trimming Scheme for AI Edge Inference.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2016
Study of total ionizing dose induced read bit errors in magneto-resistive random access memory.
Microelectron. Reliab., 2016
2013
Int. J. Distributed Sens. Networks, 2013